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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-03-21 13:52:35 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-03-24 11:17:34 +1100 |
| commit | 21a558bed91f363ea8fc3f9a95b222a0949c70e7 (patch) | |
| tree | 1bdb5b5b90c060c332c0b0476c82dc602aa219cb /target-ppc/cpu.h | |
| parent | 26a7f1291bb5581e51c413d744207d0a5910ff4c (diff) | |
| download | qemu-21a558bed91f363ea8fc3f9a95b222a0949c70e7.tar.gz qemu-21a558bed91f363ea8fc3f9a95b222a0949c70e7.tar.bz2 qemu-21a558bed91f363ea8fc3f9a95b222a0949c70e7.zip | |
ppc: Add dummy SPR_IC for POWER8
It's supposed to be an instruction counter. For now make us not
crash when accessing it.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index a7da0d3e95..167c73f863 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1685,6 +1685,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) #define SPR_MPC_MD_DBRAM1 (0x32A) #define SPR_RCPU_L2U_RA3 (0x32B) #define SPR_TAR (0x32F) +#define SPR_IC (0x350) #define SPR_VTB (0x351) #define SPR_MMCRC (0x353) #define SPR_440_INV0 (0x370) |