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author | Peter Crosthwaite <crosthwaitepeter@gmail.com> | 2015-05-24 14:20:41 -0700 |
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committer | Markus Armbruster <armbru@redhat.com> | 2015-06-22 17:40:01 +0200 |
commit | d49190c4208f2c556c3a01962a81f8a85d522bb1 (patch) | |
tree | ec56cf8fdf6f4fa51dc756947dc8455db95c307d /target-openrisc/translate.c | |
parent | 5bcda5f7349da01aded719b595f32ce2b9d396db (diff) | |
download | qemu-d49190c4208f2c556c3a01962a81f8a85d522bb1.tar.gz qemu-d49190c4208f2c556c3a01962a81f8a85d522bb1.tar.bz2 qemu-d49190c4208f2c556c3a01962a81f8a85d522bb1.zip |
disas: Remove uses of CPU env
disas does not need to access the CPU env for any reason. Change the
APIs to accept CPU pointers instead. Small change pattern needs to be
applied to all target translate.c. This brings us closer to making
disas.o a common-obj and less architecture specific in general.
Cc: Richard Henderson <rth@twiddle.net>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Leon Alrae <leon.alrae@imgtec.com>
Cc: Jia Liu <proljc@gmail.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Acked-by: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Diffstat (limited to 'target-openrisc/translate.c')
-rw-r--r-- | target-openrisc/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index dc76789785..a62cbf4011 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -1770,7 +1770,7 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu, #ifdef DEBUG_DISAS if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { qemu_log("\n"); - log_target_disas(&cpu->env, pc_start, dc->pc - pc_start, 0); + log_target_disas(cs, pc_start, dc->pc - pc_start, 0); qemu_log("\nisize=%d osize=%d\n", dc->pc - pc_start, tcg_op_buf_count()); } |