summaryrefslogtreecommitdiff
path: root/target-openrisc/mmu_helper.c
diff options
context:
space:
mode:
authorJia Liu <proljc@gmail.com>2012-07-20 15:50:40 +0800
committerBlue Swirl <blauwirbel@gmail.com>2012-07-27 21:12:56 +0000
commit726fe04572093504e7bf4ea56e0b2de559063787 (patch)
tree745326a010bcfcac3b4134f7675e4e7be96cd72d /target-openrisc/mmu_helper.c
parente67db06e9f6d7e514ee2a9b9b769ecd42977f6fb (diff)
downloadqemu-726fe04572093504e7bf4ea56e0b2de559063787.tar.gz
qemu-726fe04572093504e7bf4ea56e0b2de559063787.tar.bz2
qemu-726fe04572093504e7bf4ea56e0b2de559063787.zip
target-or32: Add MMU support
Add OpenRISC MMU support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-openrisc/mmu_helper.c')
-rw-r--r--target-openrisc/mmu_helper.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/target-openrisc/mmu_helper.c b/target-openrisc/mmu_helper.c
index 7c28079ddb..59ed371ae0 100644
--- a/target-openrisc/mmu_helper.c
+++ b/target-openrisc/mmu_helper.c
@@ -39,5 +39,25 @@
void tlb_fill(CPUOpenRISCState *env, target_ulong addr, int is_write,
int mmu_idx, uintptr_t retaddr)
{
+ TranslationBlock *tb;
+ unsigned long pc;
+ int ret;
+
+ ret = cpu_openrisc_handle_mmu_fault(env, addr, is_write, mmu_idx);
+
+ if (ret) {
+ if (retaddr) {
+ /* now we have a real cpu fault. */
+ pc = (unsigned long)retaddr;
+ tb = tb_find_pc(pc);
+ if (tb) {
+ /* the PC is inside the translated code. It means that we
+ have a virtual CPU fault. */
+ cpu_restore_state(tb, env, pc);
+ }
+ }
+ /* Raise Exception. */
+ cpu_loop_exit(env);
+ }
}
#endif