diff options
| author | Andreas Färber <afaerber@suse.de> | 2013-06-29 18:55:54 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-07-23 02:41:33 +0200 |
| commit | 00b941e581b5c42645f836ef530705bb76a3e6bb (patch) | |
| tree | 4c291f0999809416681f06f575b8ec1288744c2d /target-openrisc/cpu.c | |
| parent | 385b9f0e4d8c60037c937edd7a3735fff7570429 (diff) | |
| download | qemu-00b941e581b5c42645f836ef530705bb76a3e6bb.tar.gz qemu-00b941e581b5c42645f836ef530705bb76a3e6bb.tar.bz2 qemu-00b941e581b5c42645f836ef530705bb76a3e6bb.zip | |
cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
Change breakpoint_invalidate() argument to CPUState alongside.
Since all targets now assign a softmmu-only field, we can drop helpers
cpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd().
Prepares for changing cpu_memory_rw_debug() argument to CPUState.
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-openrisc/cpu.c')
| -rw-r--r-- | target-openrisc/cpu.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c index 27ee9f415c..3da5a7a8b1 100644 --- a/target-openrisc/cpu.c +++ b/target-openrisc/cpu.c @@ -154,7 +154,10 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data) cc->do_interrupt = openrisc_cpu_do_interrupt; cc->dump_state = openrisc_cpu_dump_state; cc->set_pc = openrisc_cpu_set_pc; - device_class_set_vmsd(dc, &vmstate_openrisc_cpu); +#ifndef CONFIG_USER_ONLY + cc->get_phys_page_debug = openrisc_cpu_get_phys_page_debug; + dc->vmsd = &vmstate_openrisc_cpu; +#endif } static void cpu_register(const OpenRISCCPUInfo *info) |