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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-03-29 01:18:24 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-03-29 01:18:24 +0000
commitf157bfe11a63a9cc12106cdfa8d54c599f5541ad (patch)
treebd29c020895960db3fe77d59c08a699d78f4ce8c /target-mips
parent20e1fb525a399c0c10b90c7b73e65fc73d251b83 (diff)
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target-mips: optimize gen_mul_vr54xx()
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6933 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/translate.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index f1ec9356a1..b023120626 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -2048,8 +2048,8 @@ static void gen_mul_vr54xx (DisasContext *ctx, uint32_t opc,
int rd, int rs, int rt)
{
const char *opn = "mul vr54xx";
- TCGv t0 = tcg_temp_local_new();
- TCGv t1 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
+ TCGv t1 = tcg_temp_new();
gen_load_gpr(t0, rs);
gen_load_gpr(t1, rt);