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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-09-14 20:45:35 +0100 |
|---|---|---|
| committer | Leon Alrae <leon.alrae@imgtec.com> | 2014-10-14 13:29:14 +0100 |
| commit | c7986fd6cd766d95496805a75397c855cb7845af (patch) | |
| tree | 338c82d4af9210a71870b8177ef07b09f4e3ef06 /target-mips | |
| parent | b808a1a812a15b91ccea3a10eea195da65909c5f (diff) | |
| download | qemu-c7986fd6cd766d95496805a75397c855cb7845af.tar.gz qemu-c7986fd6cd766d95496805a75397c855cb7845af.tar.bz2 qemu-c7986fd6cd766d95496805a75397c855cb7845af.zip | |
target-mips/translate.c: Add ifdef guard around check_mips64()
The function check_mips64() is only used if TARGET_MIPS64 is defined;
add an ifdef guard to its definition to avoid warnings about it being
unused in other configurations.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips')
| -rw-r--r-- | target-mips/translate.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index 8b62e66ca6..c23cb94538 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -1548,6 +1548,7 @@ static inline void check_insn_opc_removed(DisasContext *ctx, int flags) } } +#ifdef TARGET_MIPS64 /* This code generates a "reserved instruction" exception if 64-bit instructions are not enabled. */ static inline void check_mips_64(DisasContext *ctx) @@ -1555,6 +1556,7 @@ static inline void check_mips_64(DisasContext *ctx) if (unlikely(!(ctx->hflags & MIPS_HFLAG_64))) generate_exception(ctx, EXCP_RI); } +#endif /* Define small wrappers for gen_load_fpr* so that we have a uniform calling interface for 32 and 64-bit FPRs. No sense in changing |