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| author | Leon Alrae <leon.alrae@imgtec.com> | 2015-03-16 16:29:34 +0000 |
|---|---|---|
| committer | Leon Alrae <leon.alrae@imgtec.com> | 2015-03-18 09:58:15 +0000 |
| commit | 0af7a37054310384e00209e0a43efe95b7c19ef0 (patch) | |
| tree | cd3f6cc31de0cf729ae7f4013c2ad0526dbb5667 /target-mips | |
| parent | a5f533909e746ca6e534b232fb42c9c6fd81b468 (diff) | |
| download | qemu-0af7a37054310384e00209e0a43efe95b7c19ef0.tar.gz qemu-0af7a37054310384e00209e0a43efe95b7c19ef0.tar.bz2 qemu-0af7a37054310384e00209e0a43efe95b7c19ef0.zip | |
target-mips: save cpu state before calling MSA load and store helpers
PC needs to be saved if an exception can be generated by an helper.
This fixes a problem related to resuming the execution at unexpected address
after an exception (caused by MSA load/store instruction) has been serviced.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips')
| -rw-r--r-- | target-mips/translate.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index a91e5037f5..fd063a2aae 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -18414,12 +18414,14 @@ static void gen_msa(CPUMIPSState *env, DisasContext *ctx) case OPC_LD_H: case OPC_LD_W: case OPC_LD_D: + save_cpu_state(ctx, 1); gen_helper_msa_ld_df(cpu_env, tdf, twd, trs, ts10); break; case OPC_ST_B: case OPC_ST_H: case OPC_ST_W: case OPC_ST_D: + save_cpu_state(ctx, 1); gen_helper_msa_st_df(cpu_env, tdf, twd, trs, ts10); break; } |