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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2006-12-06 17:42:40 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2006-12-06 17:42:40 +0000
commit814b9a47490c4500fd105b524b8354764e6655e5 (patch)
tree77b03656e085fd47513316bc1b4ea6969e1e0fb2 /target-mips/mips-defs.h
parentec2309289d39dcdfd1a766b945b46d8a0e0be3a4 (diff)
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MIPS TLB performance improvements, by Daniel Jacobowitz.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2220 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/mips-defs.h')
-rw-r--r--target-mips/mips-defs.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-mips/mips-defs.h b/target-mips/mips-defs.h
index c6f9e9cbe2..63e64bbdce 100644
--- a/target-mips/mips-defs.h
+++ b/target-mips/mips-defs.h
@@ -22,6 +22,7 @@
/* Uses MIPS R4Kc TLB model */
#define MIPS_USES_R4K_TLB
#define MIPS_TLB_NB 16
+#define MIPS_TLB_MAX 128
/* basic FPU register support */
#define MIPS_USES_FPU 1
/* Define a implementation number of 1.