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authorPaul Burton <paul.burton@imgtec.com>2016-06-27 16:19:09 +0100
committerLeon Alrae <leon.alrae@imgtec.com>2016-07-12 09:10:18 +0100
commit6ec98bd7b64ad75870c8e9d87a90fcd1a64b4942 (patch)
treea63c2698286ab25fbbe9b2615e4f26dfa5c80e53 /target-mips/cpu.h
parent8f95ad1c79b4166350b982a6defe0e21faa04dac (diff)
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target-mips: add ASID mask field and replace magic values
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips/cpu.h')
-rw-r--r--target-mips/cpu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index fe1c4b843f..6325e15bab 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -343,6 +343,7 @@ struct CPUMIPSState {
int32_t CP0_Count;
target_ulong CP0_EntryHi;
#define CP0EnHi_EHINV 10
+ target_ulong CP0_EntryHi_ASID_mask;
int32_t CP0_Compare;
int32_t CP0_Status;
#define CP0St_CU3 31
@@ -503,6 +504,7 @@ struct CPUMIPSState {
int CP0_LLAddr_shift;
target_ulong CP0_WatchLo[8];
int32_t CP0_WatchHi[8];
+#define CP0WH_ASID 16
target_ulong CP0_XContext;
int32_t CP0_Framemask;
int32_t CP0_Debug;