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authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2007-06-03 11:13:39 +0000
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2007-06-03 11:13:39 +0000
commit20dcee9483361ee0621cf6d68d271ecde686fd9c (patch)
tree12935f98ad16a1c931026d01ed76beaaea0550a4 /target-m68k/helper.c
parent62ea5b0bd38471ef114ca2e2dd7507a778701cd3 (diff)
downloadqemu-20dcee9483361ee0621cf6d68d271ecde686fd9c.tar.gz
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MCF5208 emulation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2924 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-m68k/helper.c')
-rw-r--r--target-m68k/helper.c26
1 files changed, 25 insertions, 1 deletions
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index bdbc1de396..bb213a7603 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -28,6 +28,7 @@
enum m68k_cpuid {
M68K_CPUID_M5206,
+ M68K_CPUID_M5208,
M68K_CPUID_CFV4E,
M68K_CPUID_ANY,
};
@@ -39,6 +40,7 @@ struct m68k_def_t {
static m68k_def_t m68k_cpu_defs[] = {
{"m5206", M68K_CPUID_M5206},
+ {"m5208", M68K_CPUID_M5208},
{"cfv4e", M68K_CPUID_CFV4E},
{"any", M68K_CPUID_ANY},
{NULL, 0},
@@ -64,12 +66,18 @@ int cpu_m68k_set_model(CPUM68KState *env, const char * name)
case M68K_CPUID_M5206:
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
break;
+ case M68K_CPUID_M5208:
+ m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
+ m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
+ m68k_set_feature(env, M68K_FEATURE_USP);
+ break;
case M68K_CPUID_CFV4E:
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
m68k_set_feature(env, M68K_FEATURE_CF_ISA_C);
m68k_set_feature(env, M68K_FEATURE_CF_FPU);
m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
+ m68k_set_feature(env, M68K_FEATURE_USP);
break;
case M68K_CPUID_ANY:
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
@@ -79,6 +87,7 @@ int cpu_m68k_set_model(CPUM68KState *env, const char * name)
/* MAC and EMAC are mututally exclusive, so pick EMAC.
It's mostly backwards compatible. */
m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
+ m68k_set_feature(env, M68K_FEATURE_USP);
m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
break;
}
@@ -215,7 +224,11 @@ void helper_movec(CPUM68KState *env, int reg, uint32_t val)
{
switch (reg) {
case 0x02: /* CACR */
- /* Ignored. */
+ env->cacr = val;
+ m68k_switch_sp(env);
+ break;
+ case 0x04: case 0x05: case 0x06: case 0x07: /* ACR[0-3] */
+ /* TODO: Implement Access Control Registers. */
break;
case 0x801: /* VBR */
env->vbr = val;
@@ -261,6 +274,17 @@ void m68k_set_macsr(CPUM68KState *env, uint32_t val)
env->macsr = val;
}
+void m68k_switch_sp(CPUM68KState *env)
+{
+ int new_sp;
+
+ env->sp[env->current_sp] = env->aregs[7];
+ new_sp = (env->sr & SR_S && env->cacr & M68K_CACR_EUSP)
+ ? M68K_SSP : M68K_USP;
+ env->aregs[7] = env->sp[new_sp];
+ env->current_sp = new_sp;
+}
+
/* MMU */
/* TODO: This will need fixing once the MMU is implemented. */