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| author | Andreas Färber <afaerber@suse.de> | 2013-06-29 18:55:54 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-07-23 02:41:33 +0200 |
| commit | 00b941e581b5c42645f836ef530705bb76a3e6bb (patch) | |
| tree | 4c291f0999809416681f06f575b8ec1288744c2d /target-i386 | |
| parent | 385b9f0e4d8c60037c937edd7a3735fff7570429 (diff) | |
| download | qemu-00b941e581b5c42645f836ef530705bb76a3e6bb.tar.gz qemu-00b941e581b5c42645f836ef530705bb76a3e6bb.tar.bz2 qemu-00b941e581b5c42645f836ef530705bb76a3e6bb.zip | |
cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
Change breakpoint_invalidate() argument to CPUState alongside.
Since all targets now assign a softmmu-only field, we can drop helpers
cpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd().
Prepares for changing cpu_memory_rw_debug() argument to CPUState.
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-i386')
| -rw-r--r-- | target-i386/cpu-qom.h | 2 | ||||
| -rw-r--r-- | target-i386/cpu.c | 3 | ||||
| -rw-r--r-- | target-i386/helper.c | 4 |
3 files changed, 7 insertions, 2 deletions
diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h index 7e55e5fd2e..d928562c53 100644 --- a/target-i386/cpu-qom.h +++ b/target-i386/cpu-qom.h @@ -104,4 +104,6 @@ void x86_cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, void x86_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, int flags); +hwaddr x86_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); + #endif diff --git a/target-i386/cpu.c b/target-i386/cpu.c index b57ea4b6f2..cd350cb8e4 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2542,12 +2542,13 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->get_paging_enabled = x86_cpu_get_paging_enabled; #ifndef CONFIG_USER_ONLY cc->get_memory_mapping = x86_cpu_get_memory_mapping; + cc->get_phys_page_debug = x86_cpu_get_phys_page_debug; cc->write_elf64_note = x86_cpu_write_elf64_note; cc->write_elf64_qemunote = x86_cpu_write_elf64_qemunote; cc->write_elf32_note = x86_cpu_write_elf32_note; cc->write_elf32_qemunote = x86_cpu_write_elf32_qemunote; + cc->vmsd = &vmstate_x86_cpu; #endif - cpu_class_set_vmsd(cc, &vmstate_x86_cpu); } static const TypeInfo x86_cpu_type_info = { diff --git a/target-i386/helper.c b/target-i386/helper.c index d6f43d7a21..2745292d1d 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -884,8 +884,10 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, return 1; } -hwaddr cpu_get_phys_page_debug(CPUX86State *env, target_ulong addr) +hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) { + X86CPU *cpu = X86_CPU(cs); + CPUX86State *env = &cpu->env; target_ulong pde_addr, pte_addr; uint64_t pte; hwaddr paddr; |