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author | Arthur Chunqi Li <yzt356@gmail.com> | 2013-07-07 23:13:37 +0800 |
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committer | Gleb Natapov <gleb@redhat.com> | 2013-07-25 13:09:08 +0300 |
commit | 0779caeb1a17f4d3ed14e2925b36ba09b084fb7b (patch) | |
tree | fcef152e8c3e8449bf1abbdf8f98bb2fdc53c95a /target-i386/cpu.h | |
parent | f03d07d4683b2e8325a7cb60b4e14b977b1a869c (diff) | |
download | qemu-0779caeb1a17f4d3ed14e2925b36ba09b084fb7b.tar.gz qemu-0779caeb1a17f4d3ed14e2925b36ba09b084fb7b.tar.bz2 qemu-0779caeb1a17f4d3ed14e2925b36ba09b084fb7b.zip |
Initialize IA32_FEATURE_CONTROL MSR in reset and migration
The recent KVM patch adds IA32_FEATURE_CONTROL support. QEMU needs
to clear this MSR when reset vCPU and keep the value of it when
migration. This patch add this feature.
Signed-off-by: Arthur Chunqi Li <yzt356@gmail.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
Diffstat (limited to 'target-i386/cpu.h')
-rw-r--r-- | target-i386/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h index cedefdc423..3a52f94aaf 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -301,6 +301,7 @@ #define MSR_IA32_APICBASE_BSP (1<<8) #define MSR_IA32_APICBASE_ENABLE (1<<11) #define MSR_IA32_APICBASE_BASE (0xfffff<<12) +#define MSR_IA32_FEATURE_CONTROL 0x0000003a #define MSR_TSC_ADJUST 0x0000003b #define MSR_IA32_TSCDEADLINE 0x6e0 @@ -813,6 +814,7 @@ typedef struct CPUX86State { uint64_t mcg_status; uint64_t msr_ia32_misc_enable; + uint64_t msr_ia32_feature_control; /* exception/interrupt handling */ int error_code; |