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authorPeter Maydell <peter.maydell@linaro.org>2016-06-29 19:14:48 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-06-29 19:14:48 +0100
commit1ec20c2a3aa5b90522d15fccf7f052a90f70ddaa (patch)
treeec9dc5923851bb31ea6ba07f351b9e9d458e7ef0 /target-cris/cpu.h
parentef8757f1fe8095a256ee617e4dbac69d3b33ae94 (diff)
parent74b6ce43e3aacbb101018407196fc963e2c39fea (diff)
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Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
* serial port fixes (Paolo) * Q35 modeling improvements (Paolo, Vasily) * chardev cleanup improvements (Marc-André) * iscsi bugfix (Peter L.) * cpu_exec patch from multi-arch patches (Peter C.) * pci-assign tweak (Lin Ma) # gpg: Signature made Wed 29 Jun 2016 15:56:30 BST # gpg: using RSA key 0xBFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (35 commits) socket: unlink unix socket on remove socket: add listen feature char: clean up remaining chardevs when leaving vhost-user: disable chardev handlers on close vhost-user-test: fix g_cond_wait_until compat implementation vl: smp_parse: fix regression ich9: implement SCI_IRQ_SEL register ich9: implement ACPI_EN register serial: reinstate watch after migration serial: remove watch on reset char: change qemu_chr_fe_add_watch to return unsigned serial: separate serial_xmit and serial_watch_cb serial: simplify tsr_retry reset serial: make tsr_retry unsigned iscsi: fix assertion in is_sector_request_lun_aligned target-*: Don't redefine cpu_exec() pci-assign: Move "Invalid ROM" error message to pci-assign-load-rom.c vnc: generalize "VNC server running on ..." message scsi: esp: fix migration MC146818 RTC: add GPIO access to output IRQ ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-cris/cpu.h')
-rw-r--r--target-cris/cpu.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index d8c47a6c2e..e6046d20ca 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -213,7 +213,6 @@ int cris_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
int cris_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
CRISCPU *cpu_cris_init(const char *cpu_model);
-int cpu_cris_exec(CPUState *cpu);
/* you can call this signal handler from your SIGBUS and SIGSEGV
signal handlers to inform the virtual CPU of exceptions. non zero
is returned if the signal was handled by the virtual CPU. */
@@ -260,7 +259,6 @@ enum {
#define cpu_init(cpu_model) CPU(cpu_cris_init(cpu_model))
-#define cpu_exec cpu_cris_exec
#define cpu_signal_handler cpu_cris_signal_handler
/* MMU modes definitions */