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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2014-01-21 22:44:23 +1000
committerEdgar E. Iglesias <edgar.iglesias@xilinx.com>2014-02-03 14:03:59 +0000
commit3065839c7207f459e3b3b3fbb2a04abc5276a8e0 (patch)
tree5db3cea2ad125b0777a2039bc08b2953a4ccdd10 /target-cris/cpu.c
parentd66433ffdced6537ab7e6c423a8f14091c51e3e2 (diff)
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cris: Add interrupt signals to the CPU device
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target-cris/cpu.c')
-rw-r--r--target-cris/cpu.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/target-cris/cpu.c b/target-cris/cpu.c
index acb5688e5e..1ac8124d8c 100644
--- a/target-cris/cpu.c
+++ b/target-cris/cpu.c
@@ -152,6 +152,21 @@ static void cris_cpu_realizefn(DeviceState *dev, Error **errp)
ccc->parent_realize(dev, errp);
}
+#ifndef CONFIG_USER_ONLY
+static void cris_cpu_set_irq(void *opaque, int irq, int level)
+{
+ CRISCPU *cpu = opaque;
+ CPUState *cs = CPU(cpu);
+ int type = irq == CRIS_CPU_IRQ ? CPU_INTERRUPT_HARD : CPU_INTERRUPT_NMI;
+
+ if (level) {
+ cpu_interrupt(cs, type);
+ } else {
+ cpu_reset_interrupt(cs, type);
+ }
+}
+#endif
+
static void cris_cpu_initfn(Object *obj)
{
CPUState *cs = CPU(obj);
@@ -165,6 +180,11 @@ static void cris_cpu_initfn(Object *obj)
env->pregs[PR_VR] = ccc->vr;
+#ifndef CONFIG_USER_ONLY
+ /* IRQ and NMI lines. */
+ qdev_init_gpio_in(DEVICE(cpu), cris_cpu_set_irq, 2);
+#endif
+
if (tcg_enabled() && !tcg_initialized) {
tcg_initialized = true;
if (env->pregs[PR_VR] < 32) {