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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-04-15 19:19:15 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-04-17 21:34:06 +0100 |
| commit | 177311157c9dbd408728620771b1fceb65d26846 (patch) | |
| tree | 4358dace23101bfefb68dc24030fb20e1a49877a /target-arm | |
| parent | 7633378d5fbe932c9d38ae8961ef035d1ed26bfd (diff) | |
| download | qemu-177311157c9dbd408728620771b1fceb65d26846.tar.gz qemu-177311157c9dbd408728620771b1fceb65d26846.tar.bz2 qemu-177311157c9dbd408728620771b1fceb65d26846.zip | |
target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32
For system mode, we may have a 64 bit CPU which is currently executing
in AArch32 state; if we're dumping CPU state to the logs we should
therefore show the correct state for the current execution state,
rather than hardwiring it based on the type of the CPU. For consistency
with how we handle translation, we leave the 32 bit dump function
as the default, and have it hand off control to the 64 bit dump code
if we're in AArch64 mode.
Reported-by: Rob Herring <rob.herring@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/cpu-qom.h | 2 | ||||
| -rw-r--r-- | target-arm/cpu64.c | 1 | ||||
| -rw-r--r-- | target-arm/translate.c | 5 | ||||
| -rw-r--r-- | target-arm/translate.h | 8 |
4 files changed, 13 insertions, 3 deletions
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index 82f1bc7173..edc7f262fc 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -200,8 +200,6 @@ void arm_gt_ptimer_cb(void *opaque); void arm_gt_vtimer_cb(void *opaque); #ifdef TARGET_AARCH64 -void aarch64_cpu_dump_state(CPUState *cs, FILE *f, - fprintf_function cpu_fprintf, int flags); int aarch64_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c index c673ac2738..8daa622bdc 100644 --- a/target-arm/cpu64.c +++ b/target-arm/cpu64.c @@ -188,7 +188,6 @@ static void aarch64_cpu_class_init(ObjectClass *oc, void *data) CPUClass *cc = CPU_CLASS(oc); cc->do_interrupt = aarch64_cpu_do_interrupt; - cc->dump_state = aarch64_cpu_dump_state; cc->set_pc = aarch64_cpu_set_pc; cc->gdb_read_register = aarch64_cpu_gdb_read_register; cc->gdb_write_register = aarch64_cpu_gdb_write_register; diff --git a/target-arm/translate.c b/target-arm/translate.c index f7b5dafcb7..0c08cc1b81 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -11047,6 +11047,11 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, int i; uint32_t psr; + if (is_a64(env)) { + aarch64_cpu_dump_state(cs, f, cpu_fprintf, flags); + return; + } + for(i=0;i<16;i++) { cpu_fprintf(f, "R%02d=%08x", i, env->regs[i]); if ((i % 4) == 3) diff --git a/target-arm/translate.h b/target-arm/translate.h index 3f7d5ca24d..34328f4660 100644 --- a/target-arm/translate.h +++ b/target-arm/translate.h @@ -72,6 +72,8 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu, TranslationBlock *tb, bool search_pc); void gen_a64_set_pc_im(uint64_t val); +void aarch64_cpu_dump_state(CPUState *cs, FILE *f, + fprintf_function cpu_fprintf, int flags); #else static inline void a64_translate_init(void) { @@ -86,6 +88,12 @@ static inline void gen_intermediate_code_internal_a64(ARMCPU *cpu, static inline void gen_a64_set_pc_im(uint64_t val) { } + +static inline void aarch64_cpu_dump_state(CPUState *cs, FILE *f, + fprintf_function cpu_fprintf, + int flags) +{ +} #endif void arm_gen_test_cc(int cc, int label); |