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| author | Will Newton <will.newton@linaro.org> | 2014-01-31 14:47:34 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-01-31 14:47:34 +0000 |
| commit | a290c62a7521a5695e12bb9022f8b953c2f50f54 (patch) | |
| tree | 1c48dbc0885f5f9acae7c599e344d48c006d0350 /target-arm/translate.c | |
| parent | 664c6733d72c589cd9f6ccee305e7b7ce36ea06d (diff) | |
| download | qemu-a290c62a7521a5695e12bb9022f8b953c2f50f54.tar.gz qemu-a290c62a7521a5695e12bb9022f8b953c2f50f54.tar.bz2 qemu-a290c62a7521a5695e12bb9022f8b953c2f50f54.zip | |
target-arm: Add support for AArch32 FP VRINTZ
Add support for the AArch32 floating-point VRINTZ instruction.
Signed-off-by: Will Newton <will.newton@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/translate.c')
| -rw-r--r-- | target-arm/translate.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c index 2b3157cabd..9afb19fedc 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -3390,6 +3390,22 @@ static int disas_vfp_insn(CPUARMState * env, DisasContext *s, uint32_t insn) tcg_temp_free_ptr(fpst); break; } + case 13: /* vrintz */ + { + TCGv_ptr fpst = get_fpstatus_ptr(0); + TCGv_i32 tcg_rmode; + tcg_rmode = tcg_const_i32(float_round_to_zero); + gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env); + if (dp) { + gen_helper_rintd(cpu_F0d, cpu_F0d, fpst); + } else { + gen_helper_rints(cpu_F0s, cpu_F0s, fpst); + } + gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env); + tcg_temp_free_i32(tcg_rmode); + tcg_temp_free_ptr(fpst); + break; + } case 15: /* single<->double conversion */ if (dp) gen_helper_vfp_fcvtsd(cpu_F0s, cpu_F0d, cpu_env); |