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| author | Michael S. Tsirkin <mst@redhat.com> | 2013-12-23 16:52:16 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-01-08 19:07:22 +0000 |
| commit | 7b1aa025bdd8a62b203eb0a936e20af424fa2870 (patch) | |
| tree | a695a45e906fd4c14fc68f601b23e1063c5384d3 /target-arm/cpu64.c | |
| parent | 7fcd57e80d134deb925aa47934040a39fd5fa1e0 (diff) | |
| download | qemu-7b1aa025bdd8a62b203eb0a936e20af424fa2870.tar.gz qemu-7b1aa025bdd8a62b203eb0a936e20af424fa2870.tar.bz2 qemu-7b1aa025bdd8a62b203eb0a936e20af424fa2870.zip | |
target-arm: fix build with gcc 4.8.2
commit 5ce4f35781028ce1aee3341e6002f925fdc7aaf3
"target-arm: A64: add set_pc cpu method"
introduces an array aarch64_cpus which is zero
size if this code is built without CONFIG_USER_ONLY.
In particular an attempt to iterate over this array produces a warning
under gcc 4.8.2:
CC aarch64-softmmu/target-arm/cpu64.o
/scm/qemu/target-arm/cpu64.c: In function ‘aarch64_cpu_register_types’:
/scm/qemu/target-arm/cpu64.c:124:5: error: comparison of unsigned
expression < 0 is always false [-Werror=type-limits]
for (i = 0; i < ARRAY_SIZE(aarch64_cpus); i++) {
^
cc1: all warnings being treated as errors
This is the result of ARRAY_SIZE being an unsigned type,
causing "i" to be promoted to unsigned int as well.
As zero size arrays are a gcc extension, it seems
cleanest to add a dummy element with NULL name,
and test for it during registration.
We'll be able to drop this when we add more CPUs.
Cc: Alexander Graf <agraf@suse.de>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20131223145216.GA22663@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu64.c')
| -rw-r--r-- | target-arm/cpu64.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c index 04ce87951c..60acd24c0c 100644 --- a/target-arm/cpu64.c +++ b/target-arm/cpu64.c @@ -58,6 +58,7 @@ static const ARMCPUInfo aarch64_cpus[] = { #ifdef CONFIG_USER_ONLY { .name = "any", .initfn = aarch64_any_initfn }, #endif + { .name = NULL } /* TODO: drop when we support more CPUs */ }; static void aarch64_cpu_initfn(Object *obj) @@ -100,6 +101,11 @@ static void aarch64_cpu_register(const ARMCPUInfo *info) .class_init = info->class_init, }; + /* TODO: drop when we support more CPUs - all entries will have name set */ + if (!info->name) { + return; + } + type_info.name = g_strdup_printf("%s-" TYPE_ARM_CPU, info->name); type_register(&type_info); g_free((void *)type_info.name); |