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| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2015-05-14 19:23:21 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-05-18 16:41:13 +0100 |
| commit | 3bade2a9e6336e0eb7cc5ad7425994f1143c5cfa (patch) | |
| tree | b0b46899b6e4a87d1f0c0d132485cb17884858ed /include/hw | |
| parent | 8ae57b2fa35dae9aa4b50db5e632156eded9bec0 (diff) | |
| download | qemu-3bade2a9e6336e0eb7cc5ad7425994f1143c5cfa.tar.gz qemu-3bade2a9e6336e0eb7cc5ad7425994f1143c5cfa.tar.bz2 qemu-3bade2a9e6336e0eb7cc5ad7425994f1143c5cfa.zip | |
arm: xlnx-zynqmp: Add UART support
There are 2x Cadence UARTs in Zynq MP. Add them.
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: e30795536f77599fabc1052278d846ccd52322e2.1431381507.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/arm/xlnx-zynqmp.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h index c6ccbd8981..79c2b0b865 100644 --- a/include/hw/arm/xlnx-zynqmp.h +++ b/include/hw/arm/xlnx-zynqmp.h @@ -21,6 +21,7 @@ #include "hw/arm/arm.h" #include "hw/intc/arm_gic.h" #include "hw/net/cadence_gem.h" +#include "hw/char/cadence_uart.h" #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp" #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \ @@ -28,6 +29,7 @@ #define XLNX_ZYNQMP_NUM_CPUS 4 #define XLNX_ZYNQMP_NUM_GEMS 4 +#define XLNX_ZYNQMP_NUM_UARTS 2 #define XLNX_ZYNQMP_GIC_REGIONS 2 @@ -49,6 +51,7 @@ typedef struct XlnxZynqMPState { GICState gic; MemoryRegion gic_mr[XLNX_ZYNQMP_GIC_REGIONS][XLNX_ZYNQMP_GIC_ALIASES]; CadenceGEMState gem[XLNX_ZYNQMP_NUM_GEMS]; + CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS]; } XlnxZynqMPState; #define XLNX_ZYNQMP_H |