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| author | Jean-Christophe Dubois <jcd@tribudubois.net> | 2015-09-14 14:39:49 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-09-14 14:39:49 +0100 |
| commit | dde0c4ca6b849eb5c376f255767c019bb45a1d57 (patch) | |
| tree | 82e9a09c0a53ff2d22304815df9ff5de8935f76f /include/hw/arm | |
| parent | f4427280977902273f98280b2572d88b6ed53144 (diff) | |
| download | qemu-dde0c4ca6b849eb5c376f255767c019bb45a1d57.tar.gz qemu-dde0c4ca6b849eb5c376f255767c019bb45a1d57.tar.bz2 qemu-dde0c4ca6b849eb5c376f255767c019bb45a1d57.zip | |
i.MX: Add GPIO devices to i.MX31 SOC
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-id: 60b67c9a8b948159f4b4163ead86fbf701c011c6.1441828793.git.jcd@tribudubois.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm')
| -rw-r--r-- | include/hw/arm/fsl-imx31.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/hw/arm/fsl-imx31.h b/include/hw/arm/fsl-imx31.h index 891166f2cc..5e8f795f98 100644 --- a/include/hw/arm/fsl-imx31.h +++ b/include/hw/arm/fsl-imx31.h @@ -24,6 +24,7 @@ #include "hw/timer/imx_gpt.h" #include "hw/timer/imx_epit.h" #include "hw/i2c/imx_i2c.h" +#include "hw/gpio/imx_gpio.h" #include "exec/memory.h" #define TYPE_FSL_IMX31 "fsl,imx31" @@ -32,6 +33,7 @@ #define FSL_IMX31_NUM_UARTS 2 #define FSL_IMX31_NUM_EPITS 2 #define FSL_IMX31_NUM_I2CS 3 +#define FSL_IMX31_NUM_GPIOS 3 typedef struct FslIMX31State { /*< private >*/ @@ -45,6 +47,7 @@ typedef struct FslIMX31State { IMXGPTState gpt; IMXEPITState epit[FSL_IMX31_NUM_EPITS]; IMXI2CState i2c[FSL_IMX31_NUM_I2CS]; + IMXGPIOState gpio[FSL_IMX31_NUM_GPIOS]; MemoryRegion secure_rom; MemoryRegion rom; MemoryRegion iram; @@ -77,6 +80,12 @@ typedef struct FslIMX31State { #define FSL_IMX31_EPIT1_SIZE 0x4000 #define FSL_IMX31_EPIT2_ADDR 0x53F98000 #define FSL_IMX31_EPIT2_SIZE 0x4000 +#define FSL_IMX31_GPIO3_ADDR 0x53FA4000 +#define FSL_IMX31_GPIO3_SIZE 0x4000 +#define FSL_IMX31_GPIO1_ADDR 0x53FCC000 +#define FSL_IMX31_GPIO1_SIZE 0x4000 +#define FSL_IMX31_GPIO2_ADDR 0x53FD0000 +#define FSL_IMX31_GPIO2_SIZE 0x4000 #define FSL_IMX31_AVIC_ADDR 0x68000000 #define FSL_IMX31_AVIC_SIZE 0x100 #define FSL_IMX31_SDRAM0_ADDR 0x80000000 @@ -106,5 +115,8 @@ typedef struct FslIMX31State { #define FSL_IMX31_I2C1_IRQ 10 #define FSL_IMX31_I2C2_IRQ 4 #define FSL_IMX31_I2C3_IRQ 3 +#define FSL_IMX31_GPIO1_IRQ 52 +#define FSL_IMX31_GPIO2_IRQ 51 +#define FSL_IMX31_GPIO3_IRQ 56 #endif /* FSL_IMX31_H */ |