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| author | Guenter Roeck <linux@roeck-us.net> | 2016-10-28 14:12:31 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-10-28 15:51:27 +0100 |
| commit | fb70029b5099e955e3356a16bcb1c63ea99d7528 (patch) | |
| tree | 8da7dff4edc5ae00fd247be0fa30e19976d2d8f5 /hw | |
| parent | fd209e4a773dd5a7fea79eaaffd276ebcb99e92a (diff) | |
| download | qemu-fb70029b5099e955e3356a16bcb1c63ea99d7528.tar.gz qemu-fb70029b5099e955e3356a16bcb1c63ea99d7528.tar.bz2 qemu-fb70029b5099e955e3356a16bcb1c63ea99d7528.zip | |
i.MX: Fix GPIO ISR register write
Writing the ISR register is supposed to clear interrupt status bits,
not to set them.
This patch makes '-M sabrelite' work without devicetree changes (Linux
kernel versions 3.18 to 4.7 with imx_v6_v7_defconfig and up to v4.8 with
multi_v7_defconfig; mainline has different problems).
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Message-id: 1477361005-18646-1-git-send-email-linux@roeck-us.net
Acked-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/gpio/imx_gpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/gpio/imx_gpio.c b/hw/gpio/imx_gpio.c index f3574aa8f3..c36c394fda 100644 --- a/hw/gpio/imx_gpio.c +++ b/hw/gpio/imx_gpio.c @@ -237,7 +237,7 @@ static void imx_gpio_write(void *opaque, hwaddr offset, uint64_t value, break; case ISR_ADDR: - s->isr |= ~value; + s->isr &= ~value; imx_gpio_set_all_int_lines(s); break; |