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author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-11-14 17:30:35 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-11-14 17:30:35 +0000 |
commit | e875c40a15e266a16ff6ef5c2ef686e0799166b7 (patch) | |
tree | 2cf03b2d52b2e813bc5be3dc8e9053cc3ae8af78 /hw | |
parent | a98d49b1368840a4fd3ec58d08b520cff4b1c583 (diff) | |
download | qemu-e875c40a15e266a16ff6ef5c2ef686e0799166b7.tar.gz qemu-e875c40a15e266a16ff6ef5c2ef686e0799166b7.tar.bz2 qemu-e875c40a15e266a16ff6ef5c2ef686e0799166b7.zip |
indent fixes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1140 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
-rw-r--r-- | hw/dma.c | 34 |
1 files changed, 17 insertions, 17 deletions
@@ -63,17 +63,17 @@ static struct dma_cont { } dma_controllers[2]; enum { - CMD_MEMORY_TO_MEMORY = 0x01, - CMD_FIXED_ADDRESS = 0x02, - CMD_BLOCK_CONTROLLER = 0x04, - CMD_COMPRESSED_TIME = 0x08, - CMD_CYCLIC_PRIORITY = 0x10, - CMD_EXTENDED_WRITE = 0x20, - CMD_LOW_DREQ = 0x40, - CMD_LOW_DACK = 0x80, - CMD_NOT_SUPPORTED = CMD_MEMORY_TO_MEMORY | CMD_FIXED_ADDRESS - | CMD_COMPRESSED_TIME | CMD_CYCLIC_PRIORITY | CMD_EXTENDED_WRITE - | CMD_LOW_DREQ | CMD_LOW_DACK + CMD_MEMORY_TO_MEMORY = 0x01, + CMD_FIXED_ADDRESS = 0x02, + CMD_BLOCK_CONTROLLER = 0x04, + CMD_COMPRESSED_TIME = 0x08, + CMD_CYCLIC_PRIORITY = 0x10, + CMD_EXTENDED_WRITE = 0x20, + CMD_LOW_DREQ = 0x40, + CMD_LOW_DACK = 0x80, + CMD_NOT_SUPPORTED = CMD_MEMORY_TO_MEMORY | CMD_FIXED_ADDRESS + | CMD_COMPRESSED_TIME | CMD_CYCLIC_PRIORITY | CMD_EXTENDED_WRITE + | CMD_LOW_DREQ | CMD_LOW_DACK }; @@ -228,13 +228,13 @@ static void write_cont (void *opaque, uint32_t nport, uint32_t data) #ifdef DEBUG_DMA { int op, ai, dir, opmode; - op = (data >> 2) & 3; - ai = (data >> 4) & 1; - dir = (data >> 5) & 1; - opmode = (data >> 6) & 3; + op = (data >> 2) & 3; + ai = (data >> 4) & 1; + dir = (data >> 5) & 1; + opmode = (data >> 6) & 3; - linfo ("ichan %d, op %d, ai %d, dir %d, opmode %d\n", - ichan, op, ai, dir, opmode); + linfo ("ichan %d, op %d, ai %d, dir %d, opmode %d\n", + ichan, op, ai, dir, opmode); } #endif d->regs[ichan].mode = data; |