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author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-11-06 15:48:04 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-11-06 15:48:04 +0000 |
commit | 8738a8d079b661a612e89612844dc270ef5f0924 (patch) | |
tree | 3be155e7b339d69e87ba42589f55b10dd7e082e1 /hw | |
parent | c0fe3827ea18f7d29550f2ff2495cec2fe7a3d94 (diff) | |
download | qemu-8738a8d079b661a612e89612844dc270ef5f0924.tar.gz qemu-8738a8d079b661a612e89612844dc270ef5f0924.tar.bz2 qemu-8738a8d079b661a612e89612844dc270ef5f0924.zip |
serial load/save VM support (Vincent Pelletier)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1602 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
-rw-r--r-- | hw/serial.c | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/hw/serial.c b/hw/serial.c index 3fe482c391..ac04e65225 100644 --- a/hw/serial.c +++ b/hw/serial.c @@ -258,6 +258,41 @@ static void serial_event(void *opaque, int event) serial_receive_break(s); } +static void serial_save(QEMUFile *f, void *opaque) +{ + SerialState *s = opaque; + + qemu_put_8s(f,&s->divider); + qemu_put_8s(f,&s->rbr); + qemu_put_8s(f,&s->ier); + qemu_put_8s(f,&s->iir); + qemu_put_8s(f,&s->lcr); + qemu_put_8s(f,&s->mcr); + qemu_put_8s(f,&s->lsr); + qemu_put_8s(f,&s->msr); + qemu_put_8s(f,&s->scr); +} + +static int serial_load(QEMUFile *f, void *opaque, int version_id) +{ + SerialState *s = opaque; + + if(version_id != 1) + return -EINVAL; + + qemu_get_8s(f,&s->divider); + qemu_get_8s(f,&s->rbr); + qemu_get_8s(f,&s->ier); + qemu_get_8s(f,&s->iir); + qemu_get_8s(f,&s->lcr); + qemu_get_8s(f,&s->mcr); + qemu_get_8s(f,&s->lsr); + qemu_get_8s(f,&s->msr); + qemu_get_8s(f,&s->scr); + + return 0; +} + /* If fd is zero, it means that the serial device uses the console */ SerialState *serial_init(int base, int irq, CharDriverState *chr) { @@ -270,6 +305,8 @@ SerialState *serial_init(int base, int irq, CharDriverState *chr) s->lsr = UART_LSR_TEMT | UART_LSR_THRE; s->iir = UART_IIR_NO_INT; + register_savevm("serial", base, 1, serial_save, serial_load, s); + register_ioport_write(base, 8, 1, serial_ioport_write, s); register_ioport_read(base, 8, 1, serial_ioport_read, s); s->chr = chr; |