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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-01-08 16:01:13 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-01-08 16:01:13 +0000
commit749668030cf2408ab435e3fb73ae4c33ff6f097d (patch)
tree819f15fb5aab1f86ac59413d9befa55d5f2df4b1 /hw
parent886a3f41dcf76460aeb730f98c07bc54797859fa (diff)
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Some more updates for the g3bw -> g3beige change
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6230 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
-rw-r--r--hw/ppc_oldworld.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/ppc_oldworld.c b/hw/ppc_oldworld.c
index 1d5e9d67f1..6de3b35341 100644
--- a/hw/ppc_oldworld.c
+++ b/hw/ppc_oldworld.c
@@ -160,7 +160,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
* the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
* But the NVRAM is located at 0xFFF04000...
*/
- cpu_abort(env, "G3BW Mac hardware can not handle 1 MB BIOS\n");
+ cpu_abort(env, "G3 Beige Mac hardware can not handle 1 MB BIOS\n");
}
/* allocate RAM */