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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2004-02-25 23:25:55 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2004-02-25 23:25:55 +0000
commit16f62432c4985fa732c0c7dd63761b06f076a48f (patch)
tree05e8b95c1c2ca0101c5ecc5510086cef2e5b157e /hw
parent8b1f24b0903a8e43e035d5680aed2fa62c68b197 (diff)
downloadqemu-16f62432c4985fa732c0c7dd63761b06f076a48f.tar.gz
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DMA API change
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@646 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
-rw-r--r--hw/dma.c45
1 files changed, 18 insertions, 27 deletions
diff --git a/hw/dma.c b/hw/dma.c
index ee7cc42ec9..2c85b6e7bb 100644
--- a/hw/dma.c
+++ b/hw/dma.c
@@ -39,7 +39,6 @@
#define ldebug(...)
#endif
-#define MEM_REAL(addr) ((addr)+(uint32_t)(phys_ram_base))
#define LENOFA(a) ((int) (sizeof(a)/sizeof(a[0])))
struct dma_regs {
@@ -49,8 +48,8 @@ struct dma_regs {
uint8_t page;
uint8_t dack;
uint8_t eop;
- DMA_read_handler read_handler;
- DMA_misc_handler misc_handler;
+ DMA_transfer_handler transfer_handler;
+ void *opaque;
};
#define ADDR 0
@@ -284,40 +283,27 @@ static void channel_run (int ncont, int ichan)
{
struct dma_regs *r;
int n;
- int irq;
- uint32_t addr;
+ target_ulong addr;
/* int ai, dir; */
r = dma_controllers[ncont].regs + ichan;
/* ai = r->mode & 16; */
/* dir = r->mode & 32 ? -1 : 1; */
- addr = MEM_REAL ((r->page << 16) | r->now[ADDR]);
-
- irq = -1;
- n = r->read_handler (addr, (r->base[COUNT] << ncont) + (1 << ncont), &irq);
+ addr = (r->page << 16) | r->now[ADDR];
+ n = r->transfer_handler (r->opaque, addr,
+ (r->base[COUNT] << ncont) + (1 << ncont));
r->now[COUNT] = n;
- ldebug ("dma_pos %d irq %d size %d\n",
- n, irq, (r->base[1] << ncont) + (1 << ncont));
-
- if (-1 != irq) {
- pic_set_irq (irq, 1);
- }
+ ldebug ("dma_pos %d size %d\n",
+ n, (r->base[1] << ncont) + (1 << ncont));
}
void DMA_run (void)
{
- static int in_dma;
struct dma_cont *d;
int icont, ichan;
- if (in_dma) {
- log ("attempt to re-enter dma\n");
- return;
- }
-
- in_dma = 1;
d = dma_controllers;
for (icont = 0; icont < 2; icont++, d++) {
@@ -330,12 +316,11 @@ void DMA_run (void)
channel_run (icont, ichan);
}
}
- in_dma = 0;
}
void DMA_register_channel (int nchan,
- DMA_read_handler read_handler,
- DMA_misc_handler misc_handler)
+ DMA_transfer_handler transfer_handler,
+ void *opaque)
{
struct dma_regs *r;
int ichan, ncont;
@@ -344,8 +329,14 @@ void DMA_register_channel (int nchan,
ichan = nchan & 3;
r = dma_controllers[ncont].regs + ichan;
- r->read_handler = read_handler;
- r->misc_handler = misc_handler;
+ r->transfer_handler = transfer_handler;
+ r->opaque = opaque;
+}
+
+/* request the emulator to transfer a new DMA memory block ASAP */
+void DMA_schedule(int nchan)
+{
+ cpu_interrupt(cpu_single_env, CPU_INTERRUPT_EXIT);
}
void DMA_init (void)