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| author | Jan Kiszka <jan.kiszka@siemens.com> | 2009-05-02 00:29:37 +0200 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2009-05-22 10:50:34 -0500 |
| commit | fcaf8e576d0435a72093e803e752ea9f130e591b (patch) | |
| tree | fff3d6f590833c0f894a6c7c300ab126b5259d95 /hw/sun4m.c | |
| parent | 654349ddbc0bccd2544e3aef9e2f582b6f40c5ed (diff) | |
| download | qemu-fcaf8e576d0435a72093e803e752ea9f130e591b.tar.gz qemu-fcaf8e576d0435a72093e803e752ea9f130e591b.tar.bz2 qemu-fcaf8e576d0435a72093e803e752ea9f130e591b.zip | |
Introduce reset notifier order
Add the parameter 'order' to qemu_register_reset and sort callbacks on
registration. On system reset, callbacks with lower order will be
invoked before those with higher order. Update all existing users to the
standard order 0.
Note: At least for x86, the existing users seem to assume that handlers
are called in their registration order. Therefore, the patch preserves
this property. If someone feels bored, (s)he could try to identify this
dependency and express it properly on callback registration.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/sun4m.c')
| -rw-r--r-- | hw/sun4m.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/hw/sun4m.c b/hw/sun4m.c index a2e02316e8..af9f8719a4 100644 --- a/hw/sun4m.c +++ b/hw/sun4m.c @@ -418,9 +418,9 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size, cpu_sparc_set_id(env, i); envs[i] = env; if (i == 0) { - qemu_register_reset(main_cpu_reset, env); + qemu_register_reset(main_cpu_reset, 0, env); } else { - qemu_register_reset(secondary_cpu_reset, env); + qemu_register_reset(secondary_cpu_reset, 0, env); env->halted = 1; } cpu_irqs[i] = qemu_allocate_irqs(cpu_set_irq, envs[i], MAX_PILS); @@ -1201,9 +1201,9 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size, cpu_sparc_set_id(env, i); envs[i] = env; if (i == 0) { - qemu_register_reset(main_cpu_reset, env); + qemu_register_reset(main_cpu_reset, 0, env); } else { - qemu_register_reset(secondary_cpu_reset, env); + qemu_register_reset(secondary_cpu_reset, 0, env); env->halted = 1; } cpu_irqs[i] = qemu_allocate_irqs(cpu_set_irq, envs[i], MAX_PILS); @@ -1416,7 +1416,7 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size, cpu_sparc_set_id(env, 0); - qemu_register_reset(main_cpu_reset, env); + qemu_register_reset(main_cpu_reset, 0, env); cpu_irqs = qemu_allocate_irqs(cpu_set_irq, env, MAX_PILS); env->prom_addr = hwdef->slavio_base; |