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| author | Andreas Färber <afaerber@suse.de> | 2013-01-18 15:03:43 +0100 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-03-12 10:35:55 +0100 |
| commit | c3affe5670e5d0df8a7e06f1d6e80853633146df (patch) | |
| tree | bc2a6d0877cf7aea8821053cf6c8df10f167caa5 /hw/sparc | |
| parent | d8ed887bdcd29ce2e967f8b15a6a2b6dcaa11cd5 (diff) | |
| download | qemu-c3affe5670e5d0df8a7e06f1d6e80853633146df.tar.gz qemu-c3affe5670e5d0df8a7e06f1d6e80853633146df.tar.bz2 qemu-c3affe5670e5d0df8a7e06f1d6e80853633146df.zip | |
cpu: Pass CPUState to cpu_interrupt()
Move it to qom/cpu.h to avoid issues with include order.
Change pc_acpi_smi_interrupt() opaque to X86CPU.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/sparc')
| -rw-r--r-- | hw/sparc/leon3.c | 3 | ||||
| -rw-r--r-- | hw/sparc/sun4m.c | 9 |
2 files changed, 8 insertions, 4 deletions
diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index b1fbde0ff7..bf06bf4b51 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -83,8 +83,9 @@ static void leon3_set_pil_in(void *opaque, uint32_t pil_in) env->interrupt_index = TT_EXTINT | i; if (old_interrupt != env->interrupt_index) { + cs = CPU(sparc_env_get_cpu(env)); trace_leon3_set_irq(i); - cpu_interrupt(env, CPU_INTERRUPT_HARD); + cpu_interrupt(cs, CPU_INTERRUPT_HARD); } break; } diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index a1822f16f3..2f214da557 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -242,8 +242,9 @@ void cpu_check_irqs(CPUSPARCState *env) env->interrupt_index = TT_EXTINT | i; if (old_interrupt != env->interrupt_index) { + cs = CPU(sparc_env_get_cpu(env)); trace_sun4m_cpu_interrupt(i); - cpu_interrupt(env, CPU_INTERRUPT_HARD); + cpu_interrupt(cs, CPU_INTERRUPT_HARD); } break; } @@ -306,8 +307,10 @@ static void secondary_cpu_reset(void *opaque) static void cpu_halt_signal(void *opaque, int irq, int level) { - if (level && cpu_single_env) - cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HALT); + if (level && cpu_single_env) { + cpu_interrupt(CPU(sparc_env_get_cpu(cpu_single_env)), + CPU_INTERRUPT_HALT); + } } static uint64_t translate_kernel_address(void *opaque, uint64_t addr) |