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| author | Richard Henderson <rth@twiddle.net> | 2011-08-11 16:07:17 -0700 |
|---|---|---|
| committer | Avi Kivity <avi@redhat.com> | 2011-10-02 16:14:02 +0200 |
| commit | 52ce55a1024bc4b0d2c726080a205123efdd9780 (patch) | |
| tree | f19a2d43e89431e42f89128d9581f5905bf2b4b6 /hw/ppc405_uc.c | |
| parent | 39186d8ab8af8937cee4743cc1956bdc28923ac9 (diff) | |
| download | qemu-52ce55a1024bc4b0d2c726080a205123efdd9780.tar.gz qemu-52ce55a1024bc4b0d2c726080a205123efdd9780.tar.bz2 qemu-52ce55a1024bc4b0d2c726080a205123efdd9780.zip | |
ppc405: Pass in address_space_mem to ppc405{cr, ep}_init
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'hw/ppc405_uc.c')
| -rw-r--r-- | hw/ppc405_uc.c | 30 |
1 files changed, 16 insertions, 14 deletions
diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c index 86cf768c93..a6e7431882 100644 --- a/hw/ppc405_uc.c +++ b/hw/ppc405_uc.c @@ -2107,11 +2107,12 @@ static void ppc405cr_cpc_init (CPUState *env, clk_setup_t clk_setup[7], qemu_register_reset(ppc405cr_cpc_reset, cpc); } -CPUState *ppc405cr_init (MemoryRegion ram_memories[4], - target_phys_addr_t ram_bases[4], - target_phys_addr_t ram_sizes[4], - uint32_t sysclk, qemu_irq **picp, - int do_init) +CPUState *ppc405cr_init(MemoryRegion *address_space_mem, + MemoryRegion ram_memories[4], + target_phys_addr_t ram_bases[4], + target_phys_addr_t ram_sizes[4], + uint32_t sysclk, qemu_irq **picp, + int do_init) { clk_setup_t clk_setup[PPC405CR_CLK_NB]; qemu_irq dma_irqs[4]; @@ -2149,12 +2150,12 @@ CPUState *ppc405cr_init (MemoryRegion ram_memories[4], ppc405_dma_init(env, dma_irqs); /* Serial ports */ if (serial_hds[0] != NULL) { - serial_mm_init(get_system_memory(), 0xef600300, 0, pic[0], + serial_mm_init(address_space_mem, 0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE, serial_hds[0], DEVICE_BIG_ENDIAN); } if (serial_hds[1] != NULL) { - serial_mm_init(get_system_memory(), 0xef600400, 0, pic[1], + serial_mm_init(address_space_mem, 0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE, serial_hds[1], DEVICE_BIG_ENDIAN); } @@ -2455,11 +2456,12 @@ static void ppc405ep_cpc_init (CPUState *env, clk_setup_t clk_setup[8], #endif } -CPUState *ppc405ep_init (MemoryRegion ram_memories[2], - target_phys_addr_t ram_bases[2], - target_phys_addr_t ram_sizes[2], - uint32_t sysclk, qemu_irq **picp, - int do_init) +CPUState *ppc405ep_init(MemoryRegion *address_space_mem, + MemoryRegion ram_memories[2], + target_phys_addr_t ram_bases[2], + target_phys_addr_t ram_sizes[2], + uint32_t sysclk, qemu_irq **picp, + int do_init) { clk_setup_t clk_setup[PPC405EP_CLK_NB], tlb_clk_setup; qemu_irq dma_irqs[4], gpt_irqs[5], mal_irqs[4]; @@ -2506,12 +2508,12 @@ CPUState *ppc405ep_init (MemoryRegion ram_memories[2], ppc405_gpio_init(0xef600700); /* Serial ports */ if (serial_hds[0] != NULL) { - serial_mm_init(get_system_memory(), 0xef600300, 0, pic[0], + serial_mm_init(address_space_mem, 0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE, serial_hds[0], DEVICE_BIG_ENDIAN); } if (serial_hds[1] != NULL) { - serial_mm_init(get_system_memory(), 0xef600400, 0, pic[1], + serial_mm_init(address_space_mem, 0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE, serial_hds[1], DEVICE_BIG_ENDIAN); } |