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authorAnthony Liguori <aliguori@us.ibm.com>2011-08-25 14:39:18 -0500
committerAnthony Liguori <aliguori@us.ibm.com>2011-08-25 14:39:18 -0500
commit01e0451a08e0afb9af04783c320d70084cf4e574 (patch)
tree30dbbf868845acd99099c7165769f1762fa40e28 /hw/ppc405_boards.c
parentf065aa0a005ac539bf8ca556775e5cc4c3d2d3b7 (diff)
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Revert "Merge remote-tracking branch 'qemu-kvm/memory/batch' into staging"
This reverts commit 8ef9ea85a2cc1007eaefa53e6871f1f83bcef22d, reversing changes made to 444dc48298c480e42e15a8fe676be737d8a6b2a1. From Avi: Please revert the entire pull (git revert 8ef9ea85a2cc1) while I work this out - it isn't trivial. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/ppc405_boards.c')
-rw-r--r--hw/ppc405_boards.c63
1 files changed, 28 insertions, 35 deletions
diff --git a/hw/ppc405_boards.c b/hw/ppc405_boards.c
index 1eb807c4c1..dec165e40f 100644
--- a/hw/ppc405_boards.c
+++ b/hw/ppc405_boards.c
@@ -32,7 +32,6 @@
#include "qemu-log.h"
#include "loader.h"
#include "blockdev.h"
-#include "exec-memory.h"
#define BIOS_FILENAME "ppc405_rom.bin"
#define BIOS_SIZE (2048 * 1024)
@@ -182,9 +181,7 @@ static void ref405ep_init (ram_addr_t ram_size,
ppc4xx_bd_info_t bd;
CPUPPCState *env;
qemu_irq *pic;
- ram_addr_t sram_offset, bdloc;
- MemoryRegion *address_space_mem = get_system_memory();
- MemoryRegion *bios = g_new(MemoryRegion, 1);
+ ram_addr_t sram_offset, bios_offset, bdloc;
MemoryRegion *ram_memories = g_malloc(2 * sizeof(*ram_memories));
target_phys_addr_t ram_bases[2], ram_sizes[2];
target_ulong sram_size;
@@ -227,18 +224,18 @@ static void ref405ep_init (ram_addr_t ram_size,
dinfo = drive_get(IF_PFLASH, 0, fl_idx);
if (dinfo) {
bios_size = bdrv_getlength(dinfo->bdrv);
- memory_region_init_rom_device(bios, &pflash_cfi02_ops_be,
- NULL, "ef405ep.bios", bios_size);
+ bios_offset = qemu_ram_alloc(NULL, "ef405ep.bios", bios_size);
fl_sectors = (bios_size + 65535) >> 16;
#ifdef DEBUG_BOARD_INIT
printf("Register parallel flash %d size %lx"
- " at addr %lx '%s' %d\n",
- fl_idx, bios_size, -bios_size,
+ " at offset %08lx addr %lx '%s' %d\n",
+ fl_idx, bios_size, bios_offset, -bios_size,
bdrv_get_device_name(dinfo->bdrv), fl_sectors);
#endif
- pflash_cfi02_register((uint32_t)(-bios_size), bios,
+ pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,
dinfo->bdrv, 65536, fl_sectors, 1,
- 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
+ 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
+ 1);
fl_idx++;
} else
#endif
@@ -246,12 +243,12 @@ static void ref405ep_init (ram_addr_t ram_size,
#ifdef DEBUG_BOARD_INIT
printf("Load BIOS from file\n");
#endif
- memory_region_init_ram(bios, NULL, "ef405ep.bios", BIOS_SIZE);
+ bios_offset = qemu_ram_alloc(NULL, "ef405ep.bios", BIOS_SIZE);
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
if (filename) {
- bios_size = load_image(filename, memory_region_get_ram_ptr(bios));
+ bios_size = load_image(filename, qemu_get_ram_ptr(bios_offset));
g_free(filename);
} else {
bios_size = -1;
@@ -262,9 +259,8 @@ static void ref405ep_init (ram_addr_t ram_size,
exit(1);
}
bios_size = (bios_size + 0xfff) & ~0xfff;
- memory_region_set_readonly(bios, true);
- memory_region_add_subregion(address_space_mem, (uint32_t)(-bios_size),
- bios);
+ cpu_register_physical_memory((uint32_t)(-bios_size),
+ bios_size, bios_offset | IO_MEM_ROM);
}
/* Register FPGA */
#ifdef DEBUG_BOARD_INIT
@@ -511,9 +507,7 @@ static void taihu_405ep_init(ram_addr_t ram_size,
{
char *filename;
qemu_irq *pic;
- MemoryRegion *address_space_mem = get_system_memory();
- MemoryRegion *bios = g_new(MemoryRegion, 1);
- MemoryRegion *flash = g_new(MemoryRegion, 1);
+ ram_addr_t bios_offset;
MemoryRegion *ram_memories = g_malloc(2 * sizeof(*ram_memories));
target_phys_addr_t ram_bases[2], ram_sizes[2];
long bios_size;
@@ -550,17 +544,17 @@ static void taihu_405ep_init(ram_addr_t ram_size,
/* XXX: should check that size is 2MB */
// bios_size = 2 * 1024 * 1024;
fl_sectors = (bios_size + 65535) >> 16;
- memory_region_init_rom_device(bios, &pflash_cfi02_ops_be,
- NULL, "taihu_405ep.bios", bios_size);
+ bios_offset = qemu_ram_alloc(NULL, "taihu_405ep.bios", bios_size);
#ifdef DEBUG_BOARD_INIT
printf("Register parallel flash %d size %lx"
- " at addr %lx '%s' %d\n",
- fl_idx, bios_size, -bios_size,
+ " at offset %08lx addr %lx '%s' %d\n",
+ fl_idx, bios_size, bios_offset, -bios_size,
bdrv_get_device_name(dinfo->bdrv), fl_sectors);
#endif
- pflash_cfi02_register((uint32_t)(-bios_size), bios,
+ pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,
dinfo->bdrv, 65536, fl_sectors, 1,
- 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
+ 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
+ 1);
fl_idx++;
} else
#endif
@@ -570,10 +564,10 @@ static void taihu_405ep_init(ram_addr_t ram_size,
#endif
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
- memory_region_init_ram(bios, NULL, "taihu_405ep.bios", BIOS_SIZE);
+ bios_offset = qemu_ram_alloc(NULL, "taihu_405ep.bios", BIOS_SIZE);
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
if (filename) {
- bios_size = load_image(filename, memory_region_get_ram_ptr(bios));
+ bios_size = load_image(filename, qemu_get_ram_ptr(bios_offset));
g_free(filename);
} else {
bios_size = -1;
@@ -584,9 +578,8 @@ static void taihu_405ep_init(ram_addr_t ram_size,
exit(1);
}
bios_size = (bios_size + 0xfff) & ~0xfff;
- memory_region_set_readonly(bios, true);
- memory_region_add_subregion(address_space_mem,
- (uint32_t)(-bios_size), bios);
+ cpu_register_physical_memory((uint32_t)(-bios_size),
+ bios_size, bios_offset | IO_MEM_ROM);
}
/* Register Linux flash */
dinfo = drive_get(IF_PFLASH, 0, fl_idx);
@@ -597,15 +590,15 @@ static void taihu_405ep_init(ram_addr_t ram_size,
fl_sectors = (bios_size + 65535) >> 16;
#ifdef DEBUG_BOARD_INIT
printf("Register parallel flash %d size %lx"
- " at addr " TARGET_FMT_lx " '%s'\n",
- fl_idx, bios_size, (target_ulong)0xfc000000,
+ " at offset %08lx addr " TARGET_FMT_lx " '%s'\n",
+ fl_idx, bios_size, bios_offset, (target_ulong)0xfc000000,
bdrv_get_device_name(dinfo->bdrv));
#endif
- memory_region_init_rom_device(flash, &pflash_cfi02_ops_be,
- NULL, "taihu_405ep.flash", bios_size);
- pflash_cfi02_register(0xfc000000, flash,
+ bios_offset = qemu_ram_alloc(NULL, "taihu_405ep.flash", bios_size);
+ pflash_cfi02_register(0xfc000000, bios_offset,
dinfo->bdrv, 65536, fl_sectors, 1,
- 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
+ 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
+ 1);
fl_idx++;
}
/* Register CLPD & LCD display */