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author | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2010-09-20 19:08:42 +0200 |
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committer | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2010-09-24 22:01:24 +0200 |
commit | d63cb48db9016328a7a69f3a1c2938cd3dfc9d1a (patch) | |
tree | 82cade49aa240d7c7c14c846ce900b4ace992246 /hw/ppc.h | |
parent | a586e548fb41afa21291bcc96f0a657d5ceaad59 (diff) | |
download | qemu-d63cb48db9016328a7a69f3a1c2938cd3dfc9d1a.tar.gz qemu-d63cb48db9016328a7a69f3a1c2938cd3dfc9d1a.tar.bz2 qemu-d63cb48db9016328a7a69f3a1c2938cd3dfc9d1a.zip |
powerpc: Make the decr interrupt type overridable
Make it possible for boards to override the kind of interrupt
to be signaled when the decr timer hits. The 405's signal PIT
interrupts while the 440's signal DECR.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'hw/ppc.h')
-rw-r--r-- | hw/ppc.h | 4 |
1 files changed, 3 insertions, 1 deletions
@@ -19,7 +19,9 @@ int ppc_dcr_init (CPUState *env, int (*dcr_read_error)(int dcrn), int (*dcr_write_error)(int dcrn)); int ppc_dcr_register (CPUState *env, int dcrn, void *opaque, dcr_read_cb drc_read, dcr_write_cb dcr_write); -clk_setup_cb ppc_emb_timers_init (CPUState *env, uint32_t freq); +clk_setup_cb ppc_emb_timers_init (CPUState *env, uint32_t freq, + unsigned int decr_excp); + /* Embedded PowerPC reset */ void ppc40x_core_reset (CPUState *env); void ppc40x_chip_reset (CPUState *env); |