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authorStefan Weil <weil@mail.berlios.de>2009-08-28 19:37:00 +0200
committerAnthony Liguori <aliguori@us.ibm.com>2009-09-04 09:37:34 -0500
commitae027ad3c5ea9a041f46c22bcb52e879645ed171 (patch)
tree2f9f29d214f4dc62cd0dccbc87ef74d6ea622fb7 /hw/mips_malta.c
parent7b8c51add768584118a14d84f799e73ab1ec988b (diff)
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mips malta: Fix fdc regression and use qdev for i8042 setup
8baf73adf664e79eae201c3f618078a220a661d9 (qdev/isa: convert fdc) breaks MIPS Malta: Tried to create isa device isa-fdc with no isa bus present Fix this by creating an isa bus for piix4. This change also requires some more qdev related changes (similar changes were applied to pc.c) and allows cleaning of piix3/piix4 code. Thanks to Gerd Hoffmann for his hints. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/mips_malta.c')
-rw-r--r--hw/mips_malta.c19
1 files changed, 11 insertions, 8 deletions
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 275f72c650..bb6364b08a 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -765,6 +765,7 @@ void mips_malta_init (ram_addr_t ram_size,
target_long bios_size;
int64_t kernel_entry;
PCIBus *pci_bus;
+ ISADevice *isa_dev;
CPUState *env;
RTCState *rtc_state;
fdctrl_t *floppy_controller;
@@ -903,9 +904,10 @@ void mips_malta_init (ram_addr_t ram_size,
}
piix4_devfn = piix4_init(pci_bus, 80);
- pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1, i8259);
+ isa_bus_irqs(i8259);
+ pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1);
usb_uhci_piix4_init(pci_bus, piix4_devfn + 2);
- smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, i8259[9]);
+ smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_reserve_irq(9));
eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
for (i = 0; i < 8; i++) {
/* TODO: Populate SPD eeprom data. */
@@ -915,16 +917,17 @@ void mips_malta_init (ram_addr_t ram_size,
qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
qdev_init(eeprom);
}
- pit = pit_init(0x40, i8259[0]);
+ pit = pit_init(0x40, isa_reserve_irq(0));
DMA_init(0);
/* Super I/O */
- i8042_init(i8259[1], i8259[12], 0x60);
- rtc_state = rtc_init(0x70, i8259[8], 2000);
- serial_init(0x3f8, i8259[4], 115200, serial_hds[0]);
- serial_init(0x2f8, i8259[3], 115200, serial_hds[1]);
+ isa_dev = isa_create_simple("i8042", 0x60, 0x64, 1, 12);
+
+ rtc_state = rtc_init(0x70, isa_reserve_irq(8), 2000);
+ serial_init(0x3f8, isa_reserve_irq(4), 115200, serial_hds[0]);
+ serial_init(0x2f8, isa_reserve_irq(3), 115200, serial_hds[1]);
if (parallel_hds[0])
- parallel_init(0x378, i8259[7], parallel_hds[0]);
+ parallel_init(0x378, isa_reserve_irq(7), parallel_hds[0]);
for(i = 0; i < MAX_FD; i++) {
dinfo = drive_get(IF_FLOPPY, 0, i);
fd[i] = dinfo ? dinfo->bdrv : NULL;