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| author | Peter Crosthwaite <crosthwaitepeter@gmail.com> | 2016-03-04 11:30:21 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-03-04 11:30:21 +0000 |
| commit | 7ef295ea5b412cbaf82f719ccd49efb51296e841 (patch) | |
| tree | da99e5270fcf99285c0b5dfb787c4b304687843a /hw/mips | |
| parent | 140b7ce5fff6fc660b2484dfd9d33ed2e42ec5a9 (diff) | |
| download | qemu-7ef295ea5b412cbaf82f719ccd49efb51296e841.tar.gz qemu-7ef295ea5b412cbaf82f719ccd49efb51296e841.tar.bz2 qemu-7ef295ea5b412cbaf82f719ccd49efb51296e841.zip | |
loader: Add data swap option to load-elf
Some CPUs are of an opposite data-endianness to other components in the
system. Sometimes elfs have the data sections layed out with this CPU
data-endianness accounting for when loaded via the CPU, so byte swaps
(relative to other system components) will occur.
The leading example, is ARM's BE32 mode, which is is basically LE with
address manipulation on half-word and byte accesses to access the
hw/byte reversed address. This means that word data is invariant
across LE and BE32. This also means that instructions are still LE.
The expectation is that the elf will be loaded via the CPU in this
endianness scheme, which means the data in the elf is reversed at
compile time.
As QEMU loads via the system memory directly, rather than the CPU, we
need a mechanism to reverse elf data endianness to implement this
possibility.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/mips')
| -rw-r--r-- | hw/mips/mips_fulong2e.c | 2 | ||||
| -rw-r--r-- | hw/mips/mips_malta.c | 2 | ||||
| -rw-r--r-- | hw/mips/mips_mipssim.c | 2 | ||||
| -rw-r--r-- | hw/mips/mips_r4k.c | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c index 184c404454..4e5581b167 100644 --- a/hw/mips/mips_fulong2e.c +++ b/hw/mips/mips_fulong2e.c @@ -117,7 +117,7 @@ static int64_t load_kernel (CPUMIPSState *env) if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL, (uint64_t *)&kernel_entry, (uint64_t *)&kernel_low, - (uint64_t *)&kernel_high, 0, EM_MIPS, 1) < 0) { + (uint64_t *)&kernel_high, 0, EM_MIPS, 1, 0) < 0) { fprintf(stderr, "qemu: could not load kernel '%s'\n", loaderparams.kernel_filename); exit(1); diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index c04aa2b8cc..f5173c42de 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -796,7 +796,7 @@ static int64_t load_kernel (void) if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL, (uint64_t *)&kernel_entry, NULL, (uint64_t *)&kernel_high, - big_endian, EM_MIPS, 1) < 0) { + big_endian, EM_MIPS, 1, 0) < 0) { fprintf(stderr, "qemu: could not load kernel '%s'\n", loaderparams.kernel_filename); exit(1); diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c index 8951ae97d3..1ecff44a54 100644 --- a/hw/mips/mips_mipssim.c +++ b/hw/mips/mips_mipssim.c @@ -70,7 +70,7 @@ static int64_t load_kernel(void) kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL, (uint64_t *)&entry, NULL, (uint64_t *)&kernel_high, big_endian, - EM_MIPS, 1); + EM_MIPS, 1, 0); if (kernel_size >= 0) { if ((entry & ~0x7fffffffULL) == 0x80000000) entry = (int32_t)entry; diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c index b6625aeee4..724b1e9d51 100644 --- a/hw/mips/mips_r4k.c +++ b/hw/mips/mips_r4k.c @@ -88,7 +88,7 @@ static int64_t load_kernel(void) kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL, (uint64_t *)&entry, NULL, (uint64_t *)&kernel_high, big_endian, - EM_MIPS, 1); + EM_MIPS, 1, 0); if (kernel_size >= 0) { if ((entry & ~0x7fffffffULL) == 0x80000000) entry = (int32_t)entry; |