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author | Anthony Liguori <aliguori@us.ibm.com> | 2009-10-01 16:12:16 -0500 |
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committer | Anthony Liguori <aliguori@us.ibm.com> | 2009-10-01 16:12:16 -0500 |
commit | 76f1a06508ba2ae3766b2e885a3acd4fc0f3377b (patch) | |
tree | 39e92c2f818e3e8144978740b914731613af0e40 /hw/lsi53c895a.c | |
parent | 5be86926c66310373ee0f25efc9e151f2390201e (diff) | |
download | qemu-76f1a06508ba2ae3766b2e885a3acd4fc0f3377b.tar.gz qemu-76f1a06508ba2ae3766b2e885a3acd4fc0f3377b.tar.bz2 qemu-76f1a06508ba2ae3766b2e885a3acd4fc0f3377b.zip |
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Something
like this _must_ be presented on the list first so people can provide input
and cope with it.
This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/lsi53c895a.c')
-rw-r--r-- | hw/lsi53c895a.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/hw/lsi53c895a.c b/hw/lsi53c895a.c index e47c164817..62bdca8032 100644 --- a/hw/lsi53c895a.c +++ b/hw/lsi53c895a.c @@ -484,7 +484,7 @@ static void lsi_resume_script(LSIState *s) static void lsi_do_dma(LSIState *s, int out) { uint32_t count; - a_target_phys_addr addr; + target_phys_addr_t addr; if (!s->current_dma_len) { /* Wait until data is available. */ @@ -1723,14 +1723,14 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val) #undef CASE_SET_REG32 } -static void lsi_mmio_writeb(void *opaque, a_target_phys_addr addr, uint32_t val) +static void lsi_mmio_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) { LSIState *s = opaque; lsi_reg_writeb(s, addr & 0xff, val); } -static void lsi_mmio_writew(void *opaque, a_target_phys_addr addr, uint32_t val) +static void lsi_mmio_writew(void *opaque, target_phys_addr_t addr, uint32_t val) { LSIState *s = opaque; @@ -1739,7 +1739,7 @@ static void lsi_mmio_writew(void *opaque, a_target_phys_addr addr, uint32_t val) lsi_reg_writeb(s, addr + 1, (val >> 8) & 0xff); } -static void lsi_mmio_writel(void *opaque, a_target_phys_addr addr, uint32_t val) +static void lsi_mmio_writel(void *opaque, target_phys_addr_t addr, uint32_t val) { LSIState *s = opaque; @@ -1750,14 +1750,14 @@ static void lsi_mmio_writel(void *opaque, a_target_phys_addr addr, uint32_t val) lsi_reg_writeb(s, addr + 3, (val >> 24) & 0xff); } -static uint32_t lsi_mmio_readb(void *opaque, a_target_phys_addr addr) +static uint32_t lsi_mmio_readb(void *opaque, target_phys_addr_t addr) { LSIState *s = opaque; return lsi_reg_readb(s, addr & 0xff); } -static uint32_t lsi_mmio_readw(void *opaque, a_target_phys_addr addr) +static uint32_t lsi_mmio_readw(void *opaque, target_phys_addr_t addr) { LSIState *s = opaque; uint32_t val; @@ -1768,7 +1768,7 @@ static uint32_t lsi_mmio_readw(void *opaque, a_target_phys_addr addr) return val; } -static uint32_t lsi_mmio_readl(void *opaque, a_target_phys_addr addr) +static uint32_t lsi_mmio_readl(void *opaque, target_phys_addr_t addr) { LSIState *s = opaque; uint32_t val; @@ -1792,7 +1792,7 @@ static CPUWriteMemoryFunc * const lsi_mmio_writefn[3] = { lsi_mmio_writel, }; -static void lsi_ram_writeb(void *opaque, a_target_phys_addr addr, uint32_t val) +static void lsi_ram_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) { LSIState *s = opaque; uint32_t newval; @@ -1806,7 +1806,7 @@ static void lsi_ram_writeb(void *opaque, a_target_phys_addr addr, uint32_t val) s->script_ram[addr >> 2] = newval; } -static void lsi_ram_writew(void *opaque, a_target_phys_addr addr, uint32_t val) +static void lsi_ram_writew(void *opaque, target_phys_addr_t addr, uint32_t val) { LSIState *s = opaque; uint32_t newval; @@ -1822,7 +1822,7 @@ static void lsi_ram_writew(void *opaque, a_target_phys_addr addr, uint32_t val) } -static void lsi_ram_writel(void *opaque, a_target_phys_addr addr, uint32_t val) +static void lsi_ram_writel(void *opaque, target_phys_addr_t addr, uint32_t val) { LSIState *s = opaque; @@ -1830,7 +1830,7 @@ static void lsi_ram_writel(void *opaque, a_target_phys_addr addr, uint32_t val) s->script_ram[addr >> 2] = val; } -static uint32_t lsi_ram_readb(void *opaque, a_target_phys_addr addr) +static uint32_t lsi_ram_readb(void *opaque, target_phys_addr_t addr) { LSIState *s = opaque; uint32_t val; @@ -1841,7 +1841,7 @@ static uint32_t lsi_ram_readb(void *opaque, a_target_phys_addr addr) return val & 0xff; } -static uint32_t lsi_ram_readw(void *opaque, a_target_phys_addr addr) +static uint32_t lsi_ram_readw(void *opaque, target_phys_addr_t addr) { LSIState *s = opaque; uint32_t val; @@ -1853,7 +1853,7 @@ static uint32_t lsi_ram_readw(void *opaque, a_target_phys_addr addr) return le16_to_cpu(val); } -static uint32_t lsi_ram_readl(void *opaque, a_target_phys_addr addr) +static uint32_t lsi_ram_readl(void *opaque, target_phys_addr_t addr) { LSIState *s = opaque; |