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author | Isaku Yamahata <yamahata@valinux.co.jp> | 2009-10-30 21:21:07 +0900 |
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committer | Anthony Liguori <aliguori@us.ibm.com> | 2009-11-09 08:43:08 -0600 |
commit | bde8befc8f211b1e97faf4a77bc3a8207eed5969 (patch) | |
tree | 7c7b95b96400315efc8fe46a3455cbae9c045fbb /hw/grackle_pci.c | |
parent | 4a9e345164a9e1803184657a1f3a58deb13c715f (diff) | |
download | qemu-bde8befc8f211b1e97faf4a77bc3a8207eed5969.tar.gz qemu-bde8befc8f211b1e97faf4a77bc3a8207eed5969.tar.bz2 qemu-bde8befc8f211b1e97faf4a77bc3a8207eed5969.zip |
pci_host: consolidate pci config address access.
consolidate pci_config address access into pci_host.c
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/grackle_pci.c')
-rw-r--r-- | hw/grackle_pci.c | 45 |
1 files changed, 2 insertions, 43 deletions
diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c index 1facdf08e0..f3a8a7da12 100644 --- a/hw/grackle_pci.c +++ b/hw/grackle_pci.c @@ -43,45 +43,6 @@ typedef struct GrackleState { PCIHostState host_state; } GrackleState; -static void pci_grackle_config_writel (void *opaque, target_phys_addr_t addr, - uint32_t val) -{ - GrackleState *s = opaque; - - GRACKLE_DPRINTF("config_writel addr " TARGET_FMT_plx " val %x\n", addr, - val); -#ifdef TARGET_WORDS_BIGENDIAN - val = bswap32(val); -#endif - s->host_state.config_reg = val; -} - -static uint32_t pci_grackle_config_readl (void *opaque, target_phys_addr_t addr) -{ - GrackleState *s = opaque; - uint32_t val; - - val = s->host_state.config_reg; -#ifdef TARGET_WORDS_BIGENDIAN - val = bswap32(val); -#endif - GRACKLE_DPRINTF("config_readl addr " TARGET_FMT_plx " val %x\n", addr, - val); - return val; -} - -static CPUWriteMemoryFunc * const pci_grackle_config_write[] = { - &pci_grackle_config_writel, - &pci_grackle_config_writel, - &pci_grackle_config_writel, -}; - -static CPUReadMemoryFunc * const pci_grackle_config_read[] = { - &pci_grackle_config_readl, - &pci_grackle_config_readl, - &pci_grackle_config_readl, -}; - /* Don't know if this matches real hardware, but it agrees with OHW. */ static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num) { @@ -147,8 +108,7 @@ static int pci_grackle_init_device(SysBusDevice *dev) s = FROM_SYSBUS(GrackleState, dev); - pci_mem_config = cpu_register_io_memory(pci_grackle_config_read, - pci_grackle_config_write, s); + pci_mem_config = pci_host_config_register_io_memory(&s->host_state); pci_mem_data = pci_host_data_register_io_memory(&s->host_state); sysbus_init_mmio(dev, 0x1000, pci_mem_config); sysbus_init_mmio(dev, 0x1000, pci_mem_data); @@ -166,8 +126,7 @@ static int pci_dec_21154_init_device(SysBusDevice *dev) s = FROM_SYSBUS(GrackleState, dev); - pci_mem_config = cpu_register_io_memory(pci_grackle_config_read, - pci_grackle_config_write, s); + pci_mem_config = pci_host_config_register_io_memory(&s->host_state); pci_mem_data = pci_host_data_register_io_memory(&s->host_state); sysbus_init_mmio(dev, 0x1000, pci_mem_config); sysbus_init_mmio(dev, 0x1000, pci_mem_data); |