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| author | Peter Maydell <peter.maydell@linaro.org> | 2012-03-14 15:37:53 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-03-16 18:09:55 +0000 |
| commit | 0e4a398ab2c5e9b540a80859ec28163b65e7a891 (patch) | |
| tree | d82d2b3d85816bce616ec40325ebd49be3de9c6b /hw/arm_mptimer.c | |
| parent | 54e17933bf78cdbbeb0f12b2db38f210c2a992d4 (diff) | |
| download | qemu-0e4a398ab2c5e9b540a80859ec28163b65e7a891.tar.gz qemu-0e4a398ab2c5e9b540a80859ec28163b65e7a891.tar.bz2 qemu-0e4a398ab2c5e9b540a80859ec28163b65e7a891.zip | |
ARM: Remove unnecessary subpage workarounds
In the ARM per-CPU peripherals (GIC, private timers, SCU, etc),
remove workarounds for subpage memory region read/write functions
being passed offsets from the start of the page rather than the
start of the region. Following commit 5312bd8b3 the masking off
of high bits of the address offset is now harmless but unnecessary.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/arm_mptimer.c')
| -rw-r--r-- | hw/arm_mptimer.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/hw/arm_mptimer.c b/hw/arm_mptimer.c index 361e887dec..df7fb4c9bd 100644 --- a/hw/arm_mptimer.c +++ b/hw/arm_mptimer.c @@ -97,7 +97,6 @@ static uint64_t timerblock_read(void *opaque, target_phys_addr_t addr, { timerblock *tb = (timerblock *)opaque; int64_t val; - addr &= 0x1f; switch (addr) { case 0: /* Load */ return tb->load; @@ -126,7 +125,6 @@ static void timerblock_write(void *opaque, target_phys_addr_t addr, { timerblock *tb = (timerblock *)opaque; int64_t old; - addr &= 0x1f; switch (addr) { case 0: /* Load */ tb->load = value; |