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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-03-10 14:56:29 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-03-10 14:56:29 +0000 |
| commit | 43a32ed68f3aac5ccde4fa6fa4a158e9e8153c94 (patch) | |
| tree | f3e9c323d3892f6d2361e6e9450065f67dd310cc /hw/arm/pxa2xx.c | |
| parent | b29c8f115de5f48f0019afc2c779cf64e5fcefaf (diff) | |
| download | qemu-43a32ed68f3aac5ccde4fa6fa4a158e9e8153c94.tar.gz qemu-43a32ed68f3aac5ccde4fa6fa4a158e9e8153c94.tar.bz2 qemu-43a32ed68f3aac5ccde4fa6fa4a158e9e8153c94.zip | |
pxa2xx: Don't shift into sign bit
Add missing 'U' suffixes to avoid potentially shifting into
the sign bit of a signed integer.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1392988008-15938-2-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'hw/arm/pxa2xx.c')
| -rw-r--r-- | hw/arm/pxa2xx.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 904277a9da..04291488e4 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -259,7 +259,7 @@ static void pxa2xx_pwrmode_write(CPUARMState *env, const ARMCPRegInfo *ri, case 1: /* Idle */ - if (!(s->cm_regs[CCCR >> 2] & (1 << 31))) { /* CPDIS */ + if (!(s->cm_regs[CCCR >> 2] & (1U << 31))) { /* CPDIS */ cpu_interrupt(CPU(s->cpu), CPU_INTERRUPT_HALT); break; } @@ -496,7 +496,7 @@ typedef struct { #define SSCR0_SSE (1 << 7) #define SSCR0_RIM (1 << 22) #define SSCR0_TIM (1 << 23) -#define SSCR0_MOD (1 << 31) +#define SSCR0_MOD (1U << 31) #define SSCR0_DSS(x) (((((x) >> 16) & 0x10) | ((x) & 0xf)) + 1) #define SSCR1_RIE (1 << 0) #define SSCR1_TIE (1 << 1) @@ -1006,7 +1006,7 @@ static void pxa2xx_rtc_write(void *opaque, hwaddr addr, switch (addr) { case RTTR: - if (!(s->rttr & (1 << 31))) { + if (!(s->rttr & (1U << 31))) { pxa2xx_rtc_hzupdate(s); s->rttr = value; pxa2xx_rtc_alarm_update(s, s->rtsr); |