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authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-11 00:04:49 +0000
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-11 00:04:49 +0000
commit9ee6e8bb853bdea7ef6c645a1a07aa55fd206aba (patch)
tree1cd430d3d9ac641c8550cfd8956dbcce1a4b9121 /fpu/softfloat-native.h
parentee4e83ed8ddc8dac572a0123398adf78b63014ae (diff)
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ARMv7 support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'fpu/softfloat-native.h')
-rw-r--r--fpu/softfloat-native.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/fpu/softfloat-native.h b/fpu/softfloat-native.h
index 29777178b3..53bf68192f 100644
--- a/fpu/softfloat-native.h
+++ b/fpu/softfloat-native.h
@@ -224,6 +224,11 @@ INLINE float32 float32_chs(float32 a)
return -a;
}
+INLINE float32 float32_scalbn(float32 a, int n)
+{
+ return scalbnf(a, n);
+}
+
/*----------------------------------------------------------------------------
| Software IEC/IEEE double-precision conversion routines.
*----------------------------------------------------------------------------*/
@@ -311,6 +316,11 @@ INLINE float64 float64_chs(float64 a)
return -a;
}
+INLINE float64 float64_scalbn(float64 a, int n)
+{
+ return scalbn(a, n);
+}
+
#ifdef FLOATX80
/*----------------------------------------------------------------------------
@@ -391,4 +401,10 @@ INLINE floatx80 floatx80_chs(floatx80 a)
{
return -a;
}
+
+INLINE floatx80 floatx80_scalbn(floatx80 a, int n)
+{
+ return scalbnl(a, n);
+}
+
#endif