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author | Paolo Bonzini <pbonzini@redhat.com> | 2010-03-19 11:31:15 +0100 |
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committer | Aurelien Jarno <aurelien@aurel32.net> | 2010-03-26 20:48:30 +0100 |
commit | a63b5829af498775c24f685f4a40ceec3a8f93ba (patch) | |
tree | 74f94b13e4625a43dd575a215ee348b6b4636205 /dyngen-exec.h | |
parent | 7270547fe8d0d2c1d13fee592042208d4a82f73a (diff) | |
download | qemu-a63b5829af498775c24f685f4a40ceec3a8f93ba.tar.gz qemu-a63b5829af498775c24f685f4a40ceec3a8f93ba.tar.bz2 qemu-a63b5829af498775c24f685f4a40ceec3a8f93ba.zip |
remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'dyngen-exec.h')
-rw-r--r-- | dyngen-exec.h | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/dyngen-exec.h b/dyngen-exec.h index 0353f36cdd..d04eda8a91 100644 --- a/dyngen-exec.h +++ b/dyngen-exec.h @@ -50,62 +50,36 @@ extern int printf(const char *, ...); #if defined(__i386__) #define AREG0 "ebp" -#define AREG1 "ebx" -#define AREG2 "esi" #elif defined(__x86_64__) #define AREG0 "r14" -#define AREG1 "r15" -#define AREG2 "r12" #elif defined(_ARCH_PPC) #define AREG0 "r27" -#define AREG1 "r24" -#define AREG2 "r25" #elif defined(__arm__) #define AREG0 "r7" -#define AREG1 "r4" -#define AREG2 "r5" #elif defined(__hppa__) #define AREG0 "r17" -#define AREG1 "r14" -#define AREG2 "r15" #elif defined(__mips__) #define AREG0 "fp" -#define AREG1 "s0" -#define AREG2 "s1" #elif defined(__sparc__) #ifdef CONFIG_SOLARIS #define AREG0 "g2" -#define AREG1 "g3" -#define AREG2 "g4" #else #ifdef __sparc_v9__ #define AREG0 "g5" -#define AREG1 "g6" -#define AREG2 "g7" #else #define AREG0 "g6" -#define AREG1 "g1" -#define AREG2 "g2" #endif #endif #elif defined(__s390__) #define AREG0 "r10" -#define AREG1 "r7" -#define AREG2 "r8" #elif defined(__alpha__) /* Note $15 is the frame pointer, so anything in op-i386.c that would require a frame pointer, like alloca, would probably loose. */ #define AREG0 "$15" -#define AREG1 "$9" -#define AREG2 "$10" #elif defined(__mc68000) #define AREG0 "%a5" -#define AREG1 "%a4" -#define AREG2 "%d7" #elif defined(__ia64__) #define AREG0 "r7" -#define AREG1 "r4" -#define AREG2 "r5" #else #error unsupported CPU #endif |