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| author | Peter Crosthwaite <crosthwaitepeter@gmail.com> | 2015-05-10 23:29:10 -0700 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2015-09-25 12:04:44 +0200 |
| commit | ed03ecf8f07a0c59a2fb422f91e80a6edd068d06 (patch) | |
| tree | 3438cf11deb87f7c17519bf452d269c61eb1f846 | |
| parent | 22d2fb4c594e8ac540f5b3132ce0d7a635112b1a (diff) | |
| download | qemu-ed03ecf8f07a0c59a2fb422f91e80a6edd068d06.tar.gz qemu-ed03ecf8f07a0c59a2fb422f91e80a6edd068d06.tar.bz2 qemu-ed03ecf8f07a0c59a2fb422f91e80a6edd068d06.zip | |
or32: Remove ELF_MACHINE from cpu.h
The only generic code relying on this is linux-user, but linux users'
default behaviour of defaulting ELF_MACHINE to ELF_ARCH will handle
this.
The bootloader can just pass EM_OPENRISC directly, as that is
architecture specific code.
This removes another architecture specific definition from the global
namespace.
Cc: Jia Liu <proljc@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Acked-By: Riku Voipio <riku.voipio@linaro.org>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rw-r--r-- | hw/openrisc/openrisc_sim.c | 2 | ||||
| -rw-r--r-- | target-openrisc/cpu.h | 1 |
2 files changed, 1 insertions, 2 deletions
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index 5f267850e0..be6c9b5622 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -68,7 +68,7 @@ static void cpu_openrisc_load_kernel(ram_addr_t ram_size, if (kernel_filename && !qtest_enabled()) { kernel_size = load_elf(kernel_filename, NULL, NULL, - &elf_entry, NULL, NULL, 1, ELF_MACHINE, 1); + &elf_entry, NULL, NULL, 1, EM_OPENRISC, 1); entry = elf_entry; if (kernel_size < 0) { kernel_size = load_uimage(kernel_filename, diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index 560210d9e5..1ff1c9ec2a 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -21,7 +21,6 @@ #define CPU_OPENRISC_H #define TARGET_LONG_BITS 32 -#define ELF_MACHINE EM_OPENRISC #define CPUArchState struct CPUOpenRISCState |