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author | zhanghailiang <zhang.zhanghailiang@huawei.com> | 2014-12-09 15:15:59 +0800 |
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committer | Michael Tokarev <mjt@tls.msk.ru> | 2014-12-10 11:59:17 +0300 |
commit | b196d969efa3987148994f0f8da79a10ebda7641 (patch) | |
tree | a94c72e04ce254249f2de780a714b32125db9ead | |
parent | 7766aa0c0e9e1b84c80c3a8168c6d97c4a3d49b8 (diff) | |
download | qemu-b196d969efa3987148994f0f8da79a10ebda7641.tar.gz qemu-b196d969efa3987148994f0f8da79a10ebda7641.tar.bz2 qemu-b196d969efa3987148994f0f8da79a10ebda7641.zip |
vt82c686: fix coverity warning about out-of-bounds write
Refactor superio_ioport_writeb to fix the out of bounds write warning.
In addition, fix two typos: s/chage/change/
Signed-off-by: zhanghailiang <zhang.zhanghailiang@huawei.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
-rw-r--r-- | hw/isa/vt82c686.c | 41 |
1 files changed, 19 insertions, 22 deletions
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index e0c235c3c2..223b947939 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -50,13 +50,13 @@ typedef struct VT82C686BState { static void superio_ioport_writeb(void *opaque, hwaddr addr, uint64_t data, unsigned size) { - int can_write; SuperIOConfig *superio_conf = opaque; DPRINTF("superio_ioport_writeb address 0x%x val 0x%x\n", addr, data); if (addr == 0x3f0) { superio_conf->index = data & 0xff; } else { + bool can_write = true; /* 0x3f1 */ switch (superio_conf->index) { case 0x00 ... 0xdf: @@ -68,30 +68,27 @@ static void superio_ioport_writeb(void *opaque, hwaddr addr, uint64_t data, case 0xf7: case 0xf9 ... 0xfb: case 0xfd ... 0xff: - can_write = 0; + can_write = false; break; - default: - can_write = 1; - - if (can_write) { - switch (superio_conf->index) { - case 0xe7: - if ((data & 0xff) != 0xfe) { - DPRINTF("chage uart 1 base. unsupported yet\n"); - } - break; - case 0xe8: - if ((data & 0xff) != 0xbe) { - DPRINTF("chage uart 2 base. unsupported yet\n"); - } - break; - - default: - superio_conf->config[superio_conf->index] = data & 0xff; - } + case 0xe7: + if ((data & 0xff) != 0xfe) { + DPRINTF("change uart 1 base. unsupported yet\n"); + can_write = false; + } + break; + case 0xe8: + if ((data & 0xff) != 0xbe) { + DPRINTF("change uart 2 base. unsupported yet\n"); + can_write = false; } + break; + default: + break; + + } + if (can_write) { + superio_conf->config[superio_conf->index] = data & 0xff; } - superio_conf->config[superio_conf->index] = data & 0xff; } } |