summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAlex Zuepke <alexander.zuepke@hs-rm.de>2014-12-12 15:10:28 +0100
committerBastian Koppelmann <kbastian@mail.uni-paderborn.de>2014-12-21 18:32:16 +0000
commitaf715d980271a1c8ea9596bf9147b5421a49e01a (patch)
treedbc41d543bef1f2bbae9e0cc80c76702a8bf8e49
parent781b717c5049f42d45d31fd47617f3129c07541c (diff)
downloadqemu-af715d980271a1c8ea9596bf9147b5421a49e01a.tar.gz
qemu-af715d980271a1c8ea9596bf9147b5421a49e01a.tar.bz2
qemu-af715d980271a1c8ea9596bf9147b5421a49e01a.zip
target-tricore: typo in BOL format
Signed-off-by: Alex Zuepke <alexander.zuepke@hs-rm.de> Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
-rw-r--r--target-tricore/translate.c4
-rw-r--r--target-tricore/tricore-opcodes.h2
2 files changed, 3 insertions, 3 deletions
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 65abf453f0..c1322238a7 100644
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -3203,7 +3203,7 @@ static void decode_bol_opc(CPUTriCoreState *env, DisasContext *ctx, int32_t op1)
tcg_gen_qemu_ld_tl(cpu_gpr_a[r1], temp, ctx->mem_idx, MO_LEUL);
tcg_temp_free(temp);
break;
- case OPC1_32_BOL_LD_W_LONFOFF:
+ case OPC1_32_BOL_LD_W_LONGOFF:
temp = tcg_temp_new();
tcg_gen_addi_tl(temp, cpu_gpr_a[r2], address);
tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], temp, ctx->mem_idx, MO_LEUL);
@@ -3930,7 +3930,7 @@ static void decode_32Bit_opc(CPUTriCoreState *env, DisasContext *ctx)
break;
/* BOL-format */
case OPC1_32_BOL_LD_A_LONGOFF:
- case OPC1_32_BOL_LD_W_LONFOFF:
+ case OPC1_32_BOL_LD_W_LONGOFF:
case OPC1_32_BOL_LEA_LONGOFF:
case OPC1_32_BOL_ST_W_LONGOFF:
case OPC1_32_BOL_ST_A_LONGOFF:
diff --git a/target-tricore/tricore-opcodes.h b/target-tricore/tricore-opcodes.h
index 70ac5ffc7d..7aa6aed4d3 100644
--- a/target-tricore/tricore-opcodes.h
+++ b/target-tricore/tricore-opcodes.h
@@ -447,7 +447,7 @@ enum {
OPCM_32_BO_ADDRMODE_LDMST_BITREVERSE_CIRCULAR = 0x69,
/* BOL Format */
OPC1_32_BOL_LD_A_LONGOFF = 0x99,
- OPC1_32_BOL_LD_W_LONFOFF = 0x19,
+ OPC1_32_BOL_LD_W_LONGOFF = 0x19,
OPC1_32_BOL_LEA_LONGOFF = 0xd9,
OPC1_32_BOL_ST_W_LONGOFF = 0x59,
OPC1_32_BOL_ST_A_LONGOFF = 0xb5, /* 1.6 only */