x86_64 test program

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1321 c046a42c-6fe2-441c-8c8c-71466251a162

5 files changed, 588 insertions, 248 deletions

diff --git a/tests/Makefile b/tests/Makefile
index 4bd1dc6e3d..de533f9322 100644
--- a/tests/Makefile
+++ b/tests/Makefile
@@ -6,6 +6,9 @@ LDFLAGS=
 ifeq ($(ARCH),i386)
 TESTS=linux-test testthread sha1-i386 test-i386 runcom
 endif
+ifeq ($(ARCH),x86_64)
+TESTS=test-x86_64
+endif
 TESTS+=sha1# test_path
 #TESTS+=test_path
 
@@ -24,11 +27,15 @@ test_path: test_path.c
 	$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $<
 	./$@ || { rm $@; exit 1; }
 
-# i386 emulation test (test various opcodes) */
+# i386/x86_64 emulation test (test various opcodes) */
 test-i386: test-i386.c test-i386-code16.S test-i386-vm86.S \
            test-i386.h test-i386-shift.h test-i386-muldiv.h
-	$(CC) $(CFLAGS) $(LDFLAGS) -static -o $@ test-i386.c \
-              test-i386-code16.S test-i386-vm86.S -lm
+	$(CC) $(CFLAGS) $(LDFLAGS) -static -o $@ \
+              test-i386.c test-i386-code16.S test-i386-vm86.S -lm
+
+test-x86_64: test-i386.c \
+           test-i386.h test-i386-shift.h test-i386-muldiv.h
+	$(CC) $(CFLAGS) $(LDFLAGS) -static -o $@ test-i386.c -lm
 
 ifeq ($(ARCH),i386)
 test: test-i386
diff --git a/tests/test-i386-muldiv.h b/tests/test-i386-muldiv.h
index 5dba315c24..fd0d991341 100644
--- a/tests/test-i386-muldiv.h
+++ b/tests/test-i386-muldiv.h
@@ -1,7 +1,7 @@
 
-void glue(glue(test_, OP), b)(int op0, int op1) 
+void glue(glue(test_, OP), b)(long op0, long op1) 
 {
-    int res, s1, s0, flags;
+    long res, s1, s0, flags;
     s0 = op0;
     s1 = op1;
     res = s0;
@@ -10,16 +10,16 @@ void glue(glue(test_, OP), b)(int op0, int op1)
          "popf\n\t"
          stringify(OP)"b %b2\n\t" 
          "pushf\n\t"
-         "popl %1\n\t"
+         "pop %1\n\t"
          : "=a" (res), "=g" (flags)
          : "q" (s1), "0" (res), "1" (flags));
-    printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
+    printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
            stringify(OP) "b", s0, s1, res, flags & CC_MASK);
 }
 
-void glue(glue(test_, OP), w)(int op0h, int op0, int op1) 
+void glue(glue(test_, OP), w)(long op0h, long op0, long op1) 
 {
-    int res, s1, flags, resh;
+    long res, s1, flags, resh;
     s1 = op1;
     resh = op0h;
     res = op0;
@@ -28,29 +28,49 @@ void glue(glue(test_, OP), w)(int op0h, int op0, int op1)
          "popf\n\t"
          stringify(OP) "w %w3\n\t" 
          "pushf\n\t"
-         "popl %1\n\t"
+         "pop %1\n\t"
          : "=a" (res), "=g" (flags), "=d" (resh)
          : "q" (s1), "0" (res), "1" (flags), "2" (resh));
-    printf("%-10s AH=%08x AL=%08x B=%08x RH=%08x RL=%08x CC=%04x\n",
+    printf("%-10s AH=" FMTLX " AL=" FMTLX " B=" FMTLX " RH=" FMTLX " RL=" FMTLX " CC=%04lx\n",
            stringify(OP) "w", op0h, op0, s1, resh, res, flags & CC_MASK);
 }
 
-void glue(glue(test_, OP), l)(int op0h, int op0, int op1) 
+void glue(glue(test_, OP), l)(long op0h, long op0, long op1) 
 {
-    int res, s1, flags, resh;
+    long res, s1, flags, resh;
     s1 = op1;
     resh = op0h;
     res = op0;
     flags = 0;
     asm ("push %5\n\t"
          "popf\n\t"
-         stringify(OP) "l %3\n\t" 
+         stringify(OP) "l %k3\n\t" 
          "pushf\n\t"
-         "popl %1\n\t"
+         "pop %1\n\t"
          : "=a" (res), "=g" (flags), "=d" (resh)
          : "q" (s1), "0" (res), "1" (flags), "2" (resh));
-    printf("%-10s AH=%08x AL=%08x B=%08x RH=%08x RL=%08x CC=%04x\n",
+    printf("%-10s AH=" FMTLX " AL=" FMTLX " B=" FMTLX " RH=" FMTLX " RL=" FMTLX " CC=%04lx\n",
            stringify(OP) "l", op0h, op0, s1, resh, res, flags & CC_MASK);
 }
 
+#if defined(__x86_64__)
+void glue(glue(test_, OP), q)(long op0h, long op0, long op1) 
+{
+    long res, s1, flags, resh;
+    s1 = op1;
+    resh = op0h;
+    res = op0;
+    flags = 0;
+    asm ("push %5\n\t"
+         "popf\n\t"
+         stringify(OP) "q %3\n\t" 
+         "pushf\n\t"
+         "pop %1\n\t"
+         : "=a" (res), "=g" (flags), "=d" (resh)
+         : "q" (s1), "0" (res), "1" (flags), "2" (resh));
+    printf("%-10s AH=" FMTLX " AL=" FMTLX " B=" FMTLX " RH=" FMTLX " RL=" FMTLX " CC=%04lx\n",
+           stringify(OP) "q", op0h, op0, s1, resh, res, flags & CC_MASK);
+}
+#endif
+
 #undef OP
diff --git a/tests/test-i386-shift.h b/tests/test-i386-shift.h
index c3d8793b8b..7a98e27a4d 100644
--- a/tests/test-i386-shift.h
+++ b/tests/test-i386-shift.h
@@ -1,5 +1,6 @@
 
 #define exec_op glue(exec_, OP)
+#define exec_opq glue(glue(exec_, OP), q)
 #define exec_opl glue(glue(exec_, OP), l)
 #define exec_opw glue(glue(exec_, OP), w)
 #define exec_opb glue(glue(exec_, OP), b)
@@ -7,106 +8,141 @@
 #ifndef OP_SHIFTD
 
 #ifdef OP_NOBYTE
-#define EXECSHIFT(size, res, s1, s2, flags) \
+#define EXECSHIFT(size, rsize, res, s1, s2, flags) \
     asm ("push %4\n\t"\
          "popf\n\t"\
-         stringify(OP) size " %" size "2, %" size "0\n\t" \
+         stringify(OP) size " %" rsize "2, %" rsize "0\n\t" \
          "pushf\n\t"\
-         "popl %1\n\t"\
+         "pop %1\n\t"\
          : "=g" (res), "=g" (flags)\
          : "r" (s1), "0" (res), "1" (flags));
 #else
-#define EXECSHIFT(size, res, s1, s2, flags) \
+#define EXECSHIFT(size, rsize, res, s1, s2, flags) \
     asm ("push %4\n\t"\
          "popf\n\t"\
-         stringify(OP) size " %%cl, %" size "0\n\t" \
+         stringify(OP) size " %%cl, %" rsize "0\n\t" \
          "pushf\n\t"\
-         "popl %1\n\t"\
+         "pop %1\n\t"\
          : "=q" (res), "=g" (flags)\
          : "c" (s1), "0" (res), "1" (flags));
 #endif
 
-void exec_opl(int s2, int s0, int s1, int iflags)
+#if defined(__x86_64__)
+void exec_opq(long s2, long s0, long s1, long iflags)
 {
-    int res, flags;
+    long res, flags;
     res = s0;
     flags = iflags;
-    EXECSHIFT("", res, s1, s2, flags);
+    EXECSHIFT("q", "", res, s1, s2, flags);
     /* overflow is undefined if count != 1 */
     if (s1 != 1)
       flags &= ~CC_O;
-    printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
+    printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n",
+           stringify(OP) "q", s0, s1, res, iflags, flags & CC_MASK);
+}
+#endif
+
+void exec_opl(long s2, long s0, long s1, long iflags)
+{
+    long res, flags;
+    res = s0;
+    flags = iflags;
+    EXECSHIFT("l", "k", res, s1, s2, flags);
+    /* overflow is undefined if count != 1 */
+    if (s1 != 1)
+      flags &= ~CC_O;
+    printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n",
            stringify(OP) "l", s0, s1, res, iflags, flags & CC_MASK);
 }
 
-void exec_opw(int s2, int s0, int s1, int iflags)
+void exec_opw(long s2, long s0, long s1, long iflags)
 {
-    int res, flags;
+    long res, flags;
     res = s0;
     flags = iflags;
-    EXECSHIFT("w", res, s1, s2, flags);
+    EXECSHIFT("w", "w", res, s1, s2, flags);
     /* overflow is undefined if count != 1 */
     if (s1 != 1)
       flags &= ~CC_O;
-    printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
+    printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n",
            stringify(OP) "w", s0, s1, res, iflags, flags & CC_MASK);
 }
 
 #else
-#define EXECSHIFT(size, res, s1, s2, flags) \
+#define EXECSHIFT(size, rsize, res, s1, s2, flags) \
     asm ("push %4\n\t"\
          "popf\n\t"\
-         stringify(OP) size " %%cl, %" size "5, %" size "0\n\t" \
+         stringify(OP) size " %%cl, %" rsize "5, %" rsize "0\n\t" \
          "pushf\n\t"\
-         "popl %1\n\t"\
+         "pop %1\n\t"\
          : "=g" (res), "=g" (flags)\
          : "c" (s1), "0" (res), "1" (flags), "r" (s2));
 
-void exec_opl(int s2, int s0, int s1, int iflags)
+#if defined(__x86_64__)
+void exec_opq(long s2, long s0, long s1, long iflags)
+{
+    long res, flags;
+    res = s0;
+    flags = iflags;
+    EXECSHIFT("q", "", res, s1, s2, flags);
+    /* overflow is undefined if count != 1 */
+    if (s1 != 1)
+      flags &= ~CC_O;
+    printf("%-10s A=" FMTLX " B=" FMTLX " C=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n",
+           stringify(OP) "q", s0, s2, s1, res, iflags, flags & CC_MASK);
+}
+#endif
+
+void exec_opl(long s2, long s0, long s1, long iflags)
 {
-    int res, flags;
+    long res, flags;
     res = s0;
     flags = iflags;
-    EXECSHIFT("", res, s1, s2, flags);
+    EXECSHIFT("l", "k", res, s1, s2, flags);
     /* overflow is undefined if count != 1 */
     if (s1 != 1)
       flags &= ~CC_O;
-    printf("%-10s A=%08x B=%08x C=%08x R=%08x CCIN=%04x CC=%04x\n",
+    printf("%-10s A=" FMTLX " B=" FMTLX " C=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n",
            stringify(OP) "l", s0, s2, s1, res, iflags, flags & CC_MASK);
 }
 
-void exec_opw(int s2, int s0, int s1, int iflags)
+void exec_opw(long s2, long s0, long s1, long iflags)
 {
-    int res, flags;
+    long res, flags;
     res = s0;
     flags = iflags;
-    EXECSHIFT("w", res, s1, s2, flags);
+    EXECSHIFT("w", "w", res, s1, s2, flags);
     /* overflow is undefined if count != 1 */
     if (s1 != 1)
       flags &= ~CC_O;
-    printf("%-10s A=%08x B=%08x C=%08x R=%08x CCIN=%04x CC=%04x\n",
+    printf("%-10s A=" FMTLX " B=" FMTLX " C=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n",
            stringify(OP) "w", s0, s2, s1, res, iflags, flags & CC_MASK);
 }
 
 #endif
 
 #ifndef OP_NOBYTE
-void exec_opb(int s0, int s1, int iflags)
+void exec_opb(long s0, long s1, long iflags)
 {
-    int res, flags;
+    long res, flags;
     res = s0;
     flags = iflags;
-    EXECSHIFT("b", res, s1, 0, flags);
+    EXECSHIFT("b", "b", res, s1, 0, flags);
     /* overflow is undefined if count != 1 */
     if (s1 != 1)
       flags &= ~CC_O;
-    printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
+    printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n",
            stringify(OP) "b", s0, s1, res, iflags, flags & CC_MASK);
 }
 #endif
 
-void exec_op(int s2, int s0, int s1)
+void exec_op(long s2, long s0, long s1)
 {
+    s2 = i2l(s2);
+    s0 = i2l(s0);
+#if defined(__x86_64__)
+    exec_opq(s2, s0, s1, 0);
+#endif
     exec_opl(s2, s0, s1, 0);
 #ifdef OP_SHIFTD
     if (s1 <= 15)
@@ -118,6 +154,9 @@ void exec_op(int s2, int s0, int s1)
     exec_opb(s0, s1, 0);
 #endif
 #ifdef OP_CC
+#if defined(__x86_64__)
+    exec_opq(s2, s0, s1, CC_C);
+#endif
     exec_opl(s2, s0, s1, CC_C);
     exec_opw(s2, s0, s1, CC_C);
     exec_opb(s0, s1, CC_C);
@@ -126,10 +165,15 @@ void exec_op(int s2, int s0, int s1)
 
 void glue(test_, OP)(void)
 {
-    int i;
-    for(i = 0; i < 32; i++)
+    int i, n;
+#if defined(__x86_64__)
+    n = 64;
+#else
+    n = 32;
+#endif
+    for(i = 0; i < n; i++)
         exec_op(0x21ad3d34, 0x12345678, i);
-    for(i = 0; i < 32; i++)
+    for(i = 0; i < n; i++)
         exec_op(0x813f3421, 0x82345678, i);
 }
 
diff --git a/tests/test-i386.c b/tests/test-i386.c
index 9f1c4f0038..6afb727472 100644
--- a/tests/test-i386.c
+++ b/tests/test-i386.c
@@ -28,14 +28,35 @@
 #include <errno.h>
 #include <sys/ucontext.h>
 #include <sys/mman.h>
-#include <asm/vm86.h>
 
-#define TEST_CMOV  0
-#define TEST_FCOMI 0
+#if !defined(__x86_64__)
 #define TEST_VM86
+#define TEST_SEGS
+#endif
 //#define LINUX_VM86_IOPL_FIX
 //#define TEST_P4_FLAGS
-//#define TEST_SSE
+#if defined(__x86_64__)
+#define TEST_SSE
+#define TEST_CMOV  1
+#define TEST_FCOMI 1
+#else
+#define TEST_CMOV  0
+#define TEST_FCOMI 0
+#endif
+
+#if defined(__x86_64__)
+#define FMT64X "%016lx"
+#define FMTLX "%016lx"
+#define X86_64_ONLY(x) x
+#else
+#define FMT64X "%016llx"
+#define FMTLX "%08lx"
+#define X86_64_ONLY(x)
+#endif
+
+#ifdef TEST_VM86
+#include <asm/vm86.h>
+#endif
 
 #define xglue(x, y) x ## y
 #define glue(x, y) xglue(x, y)
@@ -49,12 +70,22 @@
 #define CC_S    0x0080
 #define CC_O    0x0800
 
-#define __init_call	__attribute__ ((unused,__section__ (".initcall.init")))
-
-static void *call_start __init_call = NULL;
+#define __init_call	__attribute__ ((unused,__section__ ("initcall")))
 
 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
 
+#if defined(__x86_64__)
+static inline long i2l(long v)
+{
+    return v | ((v ^ 0xabcd) << 32);
+}
+#else
+static inline long i2l(long v)
+{
+    return v;
+}
+#endif
+
 #define OP add
 #include "test-i386.h"
 
@@ -158,12 +189,20 @@ static void *call_start __init_call = NULL;
 #include "test-i386-shift.h"
 
 /* lea test (modrm support) */
+#define TEST_LEAQ(STR)\
+{\
+    asm("lea " STR ", %0"\
+        : "=r" (res)\
+        : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
+    printf("lea %s = " FMTLX "\n", STR, res);\
+}
+
 #define TEST_LEA(STR)\
 {\
-    asm("leal " STR ", %0"\
+    asm("lea " STR ", %0"\
         : "=r" (res)\
         : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
-    printf("lea %s = %08x\n", STR, res);\
+    printf("lea %s = " FMTLX "\n", STR, res);\
 }
 
 #define TEST_LEA16(STR)\
@@ -171,19 +210,19 @@ static void *call_start __init_call = NULL;
     asm(".code16 ; .byte 0x67 ; leal " STR ", %0 ; .code32"\
         : "=wq" (res)\
         : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
-    printf("lea %s = %08x\n", STR, res);\
+    printf("lea %s = %08lx\n", STR, res);\
 }
 
 
 void test_lea(void)
 {
-    int eax, ebx, ecx, edx, esi, edi, res;
-    eax = 0x0001;
-    ebx = 0x0002;
-    ecx = 0x0004;
-    edx = 0x0008;
-    esi = 0x0010;
-    edi = 0x0020;
+    long eax, ebx, ecx, edx, esi, edi, res;
+    eax = i2l(0x0001);
+    ebx = i2l(0x0002);
+    ecx = i2l(0x0004);
+    edx = i2l(0x0008);
+    esi = i2l(0x0010);
+    edi = i2l(0x0020);
 
     TEST_LEA("0x4000");
 
@@ -239,6 +278,62 @@ void test_lea(void)
     TEST_LEA("0x4000(%%edx, %%ecx, 4)");
     TEST_LEA("0x4000(%%esi, %%ecx, 8)");
 
+#if defined(__x86_64__)
+    TEST_LEAQ("0x4000");
+    TEST_LEAQ("0x4000(%%rip)");
+
+    TEST_LEAQ("(%%rax)");
+    TEST_LEAQ("(%%rbx)");
+    TEST_LEAQ("(%%rcx)");
+    TEST_LEAQ("(%%rdx)");
+    TEST_LEAQ("(%%rsi)");
+    TEST_LEAQ("(%%rdi)");
+
+    TEST_LEAQ("0x40(%%rax)");
+    TEST_LEAQ("0x40(%%rbx)");
+    TEST_LEAQ("0x40(%%rcx)");
+    TEST_LEAQ("0x40(%%rdx)");
+    TEST_LEAQ("0x40(%%rsi)");
+    TEST_LEAQ("0x40(%%rdi)");
+
+    TEST_LEAQ("0x4000(%%rax)");
+    TEST_LEAQ("0x4000(%%rbx)");
+    TEST_LEAQ("0x4000(%%rcx)");
+    TEST_LEAQ("0x4000(%%rdx)");
+    TEST_LEAQ("0x4000(%%rsi)");
+    TEST_LEAQ("0x4000(%%rdi)");
+
+    TEST_LEAQ("(%%rax, %%rcx)");
+    TEST_LEAQ("(%%rbx, %%rdx)");
+    TEST_LEAQ("(%%rcx, %%rcx)");
+    TEST_LEAQ("(%%rdx, %%rcx)");
+    TEST_LEAQ("(%%rsi, %%rcx)");
+    TEST_LEAQ("(%%rdi, %%rcx)");
+
+    TEST_LEAQ("0x40(%%rax, %%rcx)");
+    TEST_LEAQ("0x4000(%%rbx, %%rdx)");
+
+    TEST_LEAQ("(%%rcx, %%rcx, 2)");
+    TEST_LEAQ("(%%rdx, %%rcx, 4)");
+    TEST_LEAQ("(%%rsi, %%rcx, 8)");
+
+    TEST_LEAQ("(,%%rax, 2)");
+    TEST_LEAQ("(,%%rbx, 4)");
+    TEST_LEAQ("(,%%rcx, 8)");
+
+    TEST_LEAQ("0x40(,%%rax, 2)");
+    TEST_LEAQ("0x40(,%%rbx, 4)");
+    TEST_LEAQ("0x40(,%%rcx, 8)");
+
+
+    TEST_LEAQ("-10(%%rcx, %%rcx, 2)");
+    TEST_LEAQ("-10(%%rdx, %%rcx, 4)");
+    TEST_LEAQ("-10(%%rsi, %%rcx, 8)");
+
+    TEST_LEAQ("0x4000(%%rcx, %%rcx, 2)");
+    TEST_LEAQ("0x4000(%%rdx, %%rcx, 4)");
+    TEST_LEAQ("0x4000(%%rsi, %%rcx, 8)");
+#else
     /* limited 16 bit addressing test */
     TEST_LEA16("0x4000");
     TEST_LEA16("(%%bx)");
@@ -255,6 +350,7 @@ void test_lea(void)
     TEST_LEA16("0x40(%%bx,%%di)");
     TEST_LEA16("0x4000(%%bx,%%si)");
     TEST_LEA16("0x4000(%%bx,%%di)");
+#endif
 }
 
 #define TEST_JCC(JCC, v1, v2)\
@@ -276,18 +372,24 @@ void test_lea(void)
         : "r" (v1), "r" (v2));\
     printf("%-10s %d\n", "set" JCC, res);\
  if (TEST_CMOV) {\
-    asm("movl $0x12345678, %0\n\t"\
-        "cmpl %2, %1\n\t"\
-        "cmov" JCC "l %3, %0\n\t"\
+    long val = i2l(1);\
+    long res = i2l(0x12345678);\
+X86_64_ONLY(\
+    asm("cmpl %2, %1\n\t"\
+        "cmov" JCC "q %3, %0\n\t"\
         : "=r" (res)\
-        : "r" (v1), "r" (v2), "m" (1));\
-        printf("%-10s R=0x%08x\n", "cmov" JCC "l", res);\
-    asm("movl $0x12345678, %0\n\t"\
-        "cmpl %2, %1\n\t"\
+        : "r" (v1), "r" (v2), "m" (val), "0" (res));\
+        printf("%-10s R=" FMTLX "\n", "cmov" JCC "l", res);)\
+    asm("cmpl %2, %1\n\t"\
+        "cmov" JCC "l %k3, %k0\n\t"\
+        : "=r" (res)\
+        : "r" (v1), "r" (v2), "m" (val), "0" (res));\
+        printf("%-10s R=" FMTLX "\n", "cmov" JCC "l", res);\
+    asm("cmpl %2, %1\n\t"\
         "cmov" JCC "w %w3, %w0\n\t"\
         : "=r" (res)\
-        : "r" (v1), "r" (v2), "r" (1));\
-        printf("%-10s R=0x%08x\n", "cmov" JCC "w", res);\
+        : "r" (v1), "r" (v2), "r" (1), "0" (res));\
+        printf("%-10s R=" FMTLX "\n", "cmov" JCC "w", res);\
  } \
 }
 
@@ -367,9 +469,9 @@ void test_jcc(void)
 #define OP imul
 #include "test-i386-muldiv.h"
 
-void test_imulw2(int op0, int op1) 
+void test_imulw2(long op0, long op1) 
 {
-    int res, s1, s0, flags;
+    long res, s1, s0, flags;
     s0 = op0;
     s1 = op1;
     res = s0;
@@ -378,45 +480,66 @@ void test_imulw2(int op0, int op1)
          "popf\n\t"
          "imulw %w2, %w0\n\t" 
          "pushf\n\t"
-         "popl %1\n\t"
+         "pop %1\n\t"
          : "=q" (res), "=g" (flags)
          : "q" (s1), "0" (res), "1" (flags));
-    printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
+    printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
            "imulw", s0, s1, res, flags & CC_MASK);
 }
 
-void test_imull2(int op0, int op1) 
+void test_imull2(long op0, long op1) 
 {
-    int res, s1, s0, flags;
+    long res, s1, s0, flags;
     s0 = op0;
     s1 = op1;
     res = s0;
     flags = 0;
     asm volatile ("push %4\n\t"
          "popf\n\t"
-         "imull %2, %0\n\t" 
+         "imull %k2, %k0\n\t" 
          "pushf\n\t"
-         "popl %1\n\t"
+         "pop %1\n\t"
          : "=q" (res), "=g" (flags)
          : "q" (s1), "0" (res), "1" (flags));
-    printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
+    printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
            "imull", s0, s1, res, flags & CC_MASK);
 }
 
-#define TEST_IMUL_IM(size, size1, op0, op1)\
+#if defined(__x86_64__)
+void test_imulq2(long op0, long op1) 
+{
+    long res, s1, s0, flags;
+    s0 = op0;
+    s1 = op1;
+    res = s0;
+    flags = 0;
+    asm volatile ("push %4\n\t"
+         "popf\n\t"
+         "imulq %2, %0\n\t" 
+         "pushf\n\t"
+         "pop %1\n\t"
+         : "=q" (res), "=g" (flags)
+         : "q" (s1), "0" (res), "1" (flags));
+    printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
+           "imulq", s0, s1, res, flags & CC_MASK);
+}
+#endif
+
+#define TEST_IMUL_IM(size, rsize, op0, op1)\
 {\
-    int res, flags;\
+    long res, flags, s1;\
     flags = 0;\
     res = 0;\
+    s1 = op1;\
     asm volatile ("push %3\n\t"\
          "popf\n\t"\
-         "imul" size " $" #op0 ", %" size1 "2, %" size1 "0\n\t" \
+         "imul" size " $" #op0 ", %" rsize "2, %" rsize "0\n\t" \
          "pushf\n\t"\
-         "popl %1\n\t"\
+         "pop %1\n\t"\
          : "=r" (res), "=g" (flags)\
-         : "r" (op1), "1" (flags), "0" (res));\
-    printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",\
-           "imul" size " im", op0, op1, res, flags & CC_MASK);\
+         : "r" (s1), "1" (flags), "0" (res));\
+    printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",\
+           "imul" size " im", (long)op0, (long)op1, res, flags & CC_MASK);\
 }
 
 
@@ -476,10 +599,10 @@ void test_mul(void)
     TEST_IMUL_IM("w", "w", 0x8000, 0x80000000);
     TEST_IMUL_IM("w", "w", 0x7fff, 0x1000);
 
-    TEST_IMUL_IM("l", "", 45, 0x1234);
-    TEST_IMUL_IM("l", "", -45, 23);
-    TEST_IMUL_IM("l", "", 0x8000, 0x80000000);
-    TEST_IMUL_IM("l", "", 0x7fff, 0x1000);
+    TEST_IMUL_IM("l", "k", 45, 0x1234);
+    TEST_IMUL_IM("l", "k", -45, 23);
+    TEST_IMUL_IM("l", "k", 0x8000, 0x80000000);
+    TEST_IMUL_IM("l", "k", 0x7fff, 0x1000);
 
     test_idivb(0x12341678, 0x127e);
     test_idivb(0x43210123, -5);
@@ -508,30 +631,68 @@ void test_mul(void)
     test_divl(0, -233223, -45);
     test_divl(0, 0x80000000, -1);
     test_divl(0x12343, 0x12345678, 0x81234567);
+
+#if defined(__x86_64__)
+    test_imulq(0, 0x1234001d1234001d, 45);
+    test_imulq(0, 23, -45);
+    test_imulq(0, 0x8000000000000000, 0x8000000000000000);
+    test_imulq(0, 0x100000000, 0x100000000);
+
+    test_mulq(0, 0x1234001d1234001d, 45);
+    test_mulq(0, 23, -45);
+    test_mulq(0, 0x8000000000000000, 0x8000000000000000);
+    test_mulq(0, 0x100000000, 0x100000000);
+
+    test_imulq2(0x1234001d1234001d, 45);
+    test_imulq2(23, -45);
+    test_imulq2(0x8000000000000000, 0x8000000000000000);
+    test_imulq2(0x100000000, 0x100000000);
+
+    TEST_IMUL_IM("q", "", 45, 0x12341234);
+    TEST_IMUL_IM("q", "", -45, 23);
+    TEST_IMUL_IM("q", "", 0x8000, 0x8000000000000000);
+    TEST_IMUL_IM("q", "", 0x7fff, 0x10000000);
+
+    test_idivq(0, 0x12345678abcdef, 12347);
+    test_idivq(0, -233223, -45);
+    test_idivq(0, 0x8000000000000000, -1);
+    test_idivq(0x12343, 0x12345678, 0x81234567);
+
+    test_divq(0, 0x12345678abcdef, 12347);
+    test_divq(0, -233223, -45);
+    test_divq(0, 0x8000000000000000, -1);
+    test_divq(0x12343, 0x12345678, 0x81234567);
+#endif
 }
 
 #define TEST_BSX(op, size, op0)\
 {\
-    int res, val, resz;\
+    long res, val, resz;\
     val = op0;\
-    asm("xorl %1, %1\n"\
-        "movl $0x12345678, %0\n"\
+    asm("xor %1, %1\n"\
+        "mov $0x12345678, %0\n"\
         #op " %" size "2, %" size "0 ; setz %b1" \
         : "=r" (res), "=q" (resz)\
         : "g" (val));\
-    printf("%-10s A=%08x R=%08x %d\n", #op, val, res, resz);\
+    printf("%-10s A=" FMTLX " R=" FMTLX " %ld\n", #op, val, res, resz);\
 }
 
 void test_bsx(void)
 {
     TEST_BSX(bsrw, "w", 0);
     TEST_BSX(bsrw, "w", 0x12340128);
-    TEST_BSX(bsrl, "", 0);
-    TEST_BSX(bsrl, "", 0x00340128);
     TEST_BSX(bsfw, "w", 0);
     TEST_BSX(bsfw, "w", 0x12340128);
-    TEST_BSX(bsfl, "", 0);
-    TEST_BSX(bsfl, "", 0x00340128);
+    TEST_BSX(bsrl, "k", 0);
+    TEST_BSX(bsrl, "k", 0x00340128);
+    TEST_BSX(bsfl, "k", 0);
+    TEST_BSX(bsfl, "k", 0x00340128);
+#if defined(__x86_64__)
+    TEST_BSX(bsrq, "", 0);
+    TEST_BSX(bsrq, "", 0x003401281234);
+    TEST_BSX(bsfq, "", 0);
+    TEST_BSX(bsfq, "", 0x003401281234);
+#endif
 }
 
 /**********************************************/
@@ -570,14 +731,14 @@ void test_fcmp(double a, double b)
     printf("(%f<=%f)=%d\n",
            a, b, a >= b);
     if (TEST_FCOMI) {
-        unsigned int eflags;
+        long eflags;
         /* test f(u)comi instruction */
         asm("fcomi %2, %1\n"
             "pushf\n"
             "pop %0\n"
             : "=r" (eflags)
             : "t" (a), "u" (b));
-        printf("fcomi(%f %f)=%08x\n", a, b, eflags & (CC_Z | CC_P | CC_C));
+        printf("fcomi(%f %f)=%08lx\n", a, b, eflags & (CC_Z | CC_P | CC_C));
     }
 }
 
@@ -596,8 +757,8 @@ void test_fcvt(double a)
     la = a;
     printf("(float)%f = %f\n", a, fa);
     printf("(long double)%f = %Lf\n", a, la);
-    printf("a=%016Lx\n", *(long long *)&a);
-    printf("la=%016Lx %04x\n", *(long long *)&la, 
+    printf("a=" FMT64X "\n", *(uint64_t *)&a);
+    printf("la=" FMT64X " %04x\n", *(uint64_t *)&la, 
            *(unsigned short *)((char *)(&la) + 8));
 
     /* test all roundings */
@@ -611,7 +772,7 @@ void test_fcvt(double a)
         asm volatile ("fldcw %0" : : "m" (fpuc));
         printf("(short)a = %d\n", wa);
         printf("(int)a = %d\n", ia);
-        printf("(int64_t)a = %Ld\n", lla);
+        printf("(int64_t)a = " FMT64X "\n", lla);
         printf("rint(a) = %f\n", ra);
     }
 }
@@ -709,14 +870,14 @@ void test_fenv(void)
         "fcmov" CC " %2, %0\n"\
         : "=t" (res)\
         : "0" (a), "u" (b), "g" (eflags));\
-    printf("fcmov%s eflags=0x%04x-> %f\n", \
-           CC, eflags, res);\
+    printf("fcmov%s eflags=0x%04lx-> %f\n", \
+           CC, (long)eflags, res);\
 }
 
 void test_fcmov(void)
 {
     double a, b;
-    int eflags, i;
+    long eflags, i;
 
     a = 1.0;
     b = 2.0;
@@ -762,6 +923,7 @@ void test_floats(void)
 }
 
 /**********************************************/
+#if !defined(__x86_64__)
 
 #define TEST_BCD(op, op0, cc_in, cc_mask)\
 {\
@@ -772,7 +934,7 @@ void test_floats(void)
          "popf\n\t"\
          #op "\n\t"\
          "pushf\n\t"\
-         "popl %1\n\t"\
+         "pop %1\n\t"\
         : "=a" (res), "=g" (flags)\
         : "0" (res), "1" (flags));\
     printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",\
@@ -830,42 +992,53 @@ void test_bcd(void)
     TEST_BCD(aam, 0x12340547, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
     TEST_BCD(aad, 0x12340407, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
 }
+#endif
 
 #define TEST_XCHG(op, size, opconst)\
 {\
-    int op0, op1;\
-    op0 = 0x12345678;\
-    op1 = 0xfbca7654;\
+    long op0, op1;\
+    op0 = i2l(0x12345678);\
+    op1 = i2l(0xfbca7654);\
     asm(#op " %" size "0, %" size "1" \
         : "=q" (op0), opconst (op1) \
         : "0" (op0), "1" (op1));\
-    printf("%-10s A=%08x B=%08x\n",\
+    printf("%-10s A=" FMTLX " B=" FMTLX "\n",\
            #op, op0, op1);\
 }
 
 #define TEST_CMPXCHG(op, size, opconst, eax)\
 {\
-    int op0, op1;\
-    op0 = 0x12345678;\
-    op1 = 0xfbca7654;\
+    long op0, op1, op2;\
+    op0 = i2l(0x12345678);\
+    op1 = i2l(0xfbca7654);\
+    op2 = i2l(eax);\
     asm(#op " %" size "0, %" size "1" \
         : "=q" (op0), opconst (op1) \
-        : "0" (op0), "1" (op1), "a" (eax));\
-    printf("%-10s EAX=%08x A=%08x C=%08x\n",\
-           #op, eax, op0, op1);\
+        : "0" (op0), "1" (op1), "a" (op2));\
+    printf("%-10s EAX=" FMTLX " A=" FMTLX " C=" FMTLX "\n",\
+           #op, op2, op0, op1);\
 }
 
 void test_xchg(void)
 {
-    TEST_XCHG(xchgl, "", "=q");
+#if defined(__x86_64__)
+    TEST_XCHG(xchgq, "", "=q");
+#endif
+    TEST_XCHG(xchgl, "k", "=q");
     TEST_XCHG(xchgw, "w", "=q");
     TEST_XCHG(xchgb, "b", "=q");
 
-    TEST_XCHG(xchgl, "", "=m");
+#if defined(__x86_64__)
+    TEST_XCHG(xchgq, "", "=m");
+#endif
+    TEST_XCHG(xchgl, "k", "=m");
     TEST_XCHG(xchgw, "w", "=m");
     TEST_XCHG(xchgb, "b", "=m");
 
-    TEST_XCHG(xaddl, "", "=q");
+#if defined(__x86_64__)
+    TEST_XCHG(xaddq, "", "=q");
+#endif
+    TEST_XCHG(xaddl, "k", "=q");
     TEST_XCHG(xaddw, "w", "=q");
     TEST_XCHG(xaddb, "b", "=q");
 
@@ -876,29 +1049,44 @@ void test_xchg(void)
         printf("xaddl same res=%08x\n", res);
     }
 
-    TEST_XCHG(xaddl, "", "=m");
+#if defined(__x86_64__)
+    TEST_XCHG(xaddq, "", "=m");
+#endif
+    TEST_XCHG(xaddl, "k", "=m");
     TEST_XCHG(xaddw, "w", "=m");
     TEST_XCHG(xaddb, "b", "=m");
 
-    TEST_CMPXCHG(cmpxchgl, "", "=q", 0xfbca7654);
+#if defined(__x86_64__)
+    TEST_CMPXCHG(cmpxchgq, "", "=q", 0xfbca7654);
+#endif
+    TEST_CMPXCHG(cmpxchgl, "k", "=q", 0xfbca7654);
     TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfbca7654);
     TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfbca7654);
 
-    TEST_CMPXCHG(cmpxchgl, "", "=q", 0xfffefdfc);
+#if defined(__x86_64__)
+    TEST_CMPXCHG(cmpxchgq, "", "=q", 0xfffefdfc);
+#endif
+    TEST_CMPXCHG(cmpxchgl, "k", "=q", 0xfffefdfc);
     TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfffefdfc);
     TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfffefdfc);
 
-    TEST_CMPXCHG(cmpxchgl, "", "=m", 0xfbca7654);
+#if defined(__x86_64__)
+    TEST_CMPXCHG(cmpxchgq, "", "=m", 0xfbca7654);
+#endif
+    TEST_CMPXCHG(cmpxchgl, "k", "=m", 0xfbca7654);
     TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfbca7654);
     TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfbca7654);
 
-    TEST_CMPXCHG(cmpxchgl, "", "=m", 0xfffefdfc);
+#if defined(__x86_64__)
+    TEST_CMPXCHG(cmpxchgq, "", "=m", 0xfffefdfc);
+#endif
+    TEST_CMPXCHG(cmpxchgl, "k", "=m", 0xfffefdfc);
     TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfffefdfc);
     TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfffefdfc);
 
     {
         uint64_t op0, op1, op2;
-        int i, eflags;
+        long i, eflags;
 
         for(i = 0; i < 2; i++) {
             op0 = 0x123456789abcd;
@@ -909,15 +1097,16 @@ void test_xchg(void)
             op2 = 0x6532432432434;
             asm("cmpxchg8b %1\n" 
                 "pushf\n"
-                "popl %2\n"
+                "pop %2\n"
                 : "=A" (op0), "=m" (op1), "=g" (eflags)
                 : "0" (op0), "m" (op1), "b" ((int)op2), "c" ((int)(op2 >> 32)));
-            printf("cmpxchg8b: op0=%016llx op1=%016llx CC=%02x\n", 
+            printf("cmpxchg8b: op0=" FMT64X " op1=" FMT64X " CC=%02lx\n", 
                     op0, op1, eflags & CC_Z);
         }
     }
 }
 
+#ifdef TEST_SEGS
 /**********************************************/
 /* segmentation tests */
 
@@ -931,11 +1120,11 @@ _syscall3(int, modify_ldt, int, func, void *, ptr, unsigned long, bytecount)
 #define modify_ldt_ldt_s user_desc
 #endif
 
+#define MK_SEL(n) (((n) << 3) | 7)
+
 uint8_t seg_data1[4096];
 uint8_t seg_data2[4096];
 
-#define MK_SEL(n) (((n) << 3) | 7)
-
 #define TEST_LR(op, size, seg, mask)\
 {\
     int res, res2;\
@@ -1079,6 +1268,7 @@ void test_code16(void)
                   : "i" (MK_SEL(1)), "i" (&code16_func3): "memory", "cc");
     printf("func3() = 0x%08x\n", res);
 }
+#endif
 
 extern char func_lret32;
 extern char func_iret32;
@@ -1086,66 +1276,77 @@ extern char func_iret32;
 void test_misc(void)
 {
     char table[256];
-    int res, i;
+    long res, i;
 
     for(i=0;i<256;i++) table[i] = 256 - i;
     res = 0x12345678;
     asm ("xlat" : "=a" (res) : "b" (table), "0" (res));
-    printf("xlat: EAX=%08x\n", res);
+    printf("xlat: EAX=" FMTLX "\n", res);
 
-    asm volatile ("pushl %%cs ; call %1" 
+#if !defined(__x86_64__)
+    asm volatile ("push %%cs ; call %1" 
                   : "=a" (res)
                   : "m" (func_lret32): "memory", "cc");
-    printf("func_lret32=%x\n", res);
+    printf("func_lret32=" FMTLX "\n", res);
 
-    asm volatile ("pushfl ; pushl %%cs ; call %1" 
+    asm volatile ("pushf ; push %%cs ; call %1" 
                   : "=a" (res)
                   : "m" (func_iret32): "memory", "cc");
-    printf("func_iret32=%x\n", res);
+    printf("func_iret32=" FMTLX "\n", res);
+#endif
 
+#if defined(__x86_64__)
+    /* specific popl test */
+    asm volatile ("push $12345432 ; push $0x9abcdef ; pop (%%rsp) ; pop %0"
+                  : "=g" (res));
+    printf("popl esp=" FMTLX "\n", res);
+#else
     /* specific popl test */
     asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popl (%%esp) ; popl %0"
                   : "=g" (res));
-    printf("popl esp=%x\n", res);
+    printf("popl esp=" FMTLX "\n", res);
 
     /* specific popw test */
     asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popw (%%esp) ; addl $2, %%esp ; popl %0"
                   : "=g" (res));
-    printf("popw esp=%x\n", res);
+    printf("popw esp=" FMTLX "\n", res);
+#endif
 }
 
 uint8_t str_buffer[4096];
 
 #define TEST_STRING1(OP, size, DF, REP)\
 {\
-    int esi, edi, eax, ecx, eflags;\
+    long esi, edi, eax, ecx, eflags;\
 \
     esi = (long)(str_buffer + sizeof(str_buffer) / 2);\
     edi = (long)(str_buffer + sizeof(str_buffer) / 2) + 16;\
-    eax = 0x12345678;\
+    eax = i2l(0x12345678);\
     ecx = 17;\
 \
-    asm volatile ("pushl $0\n\t"\
+    asm volatile ("push $0\n\t"\
                   "popf\n\t"\
                   DF "\n\t"\
                   REP #OP size "\n\t"\
                   "cld\n\t"\
                   "pushf\n\t"\
-                  "popl %4\n\t"\
+                  "pop %4\n\t"\
                   : "=S" (esi), "=D" (edi), "=a" (eax), "=c" (ecx), "=g" (eflags)\
                   : "0" (esi), "1" (edi), "2" (eax), "3" (ecx));\
-    printf("%-10s ESI=%08x EDI=%08x EAX=%08x ECX=%08x EFL=%04x\n",\
+    printf("%-10s ESI=" FMTLX " EDI=" FMTLX " EAX=" FMTLX " ECX=" FMTLX " EFL=%04x\n",\
            REP #OP size, esi, edi, eax, ecx,\
-           eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));\
+           (int)(eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)));\
 }
 
 #define TEST_STRING(OP, REP)\
     TEST_STRING1(OP, "b", "", REP);\
     TEST_STRING1(OP, "w", "", REP);\
     TEST_STRING1(OP, "l", "", REP);\
+    X86_64_ONLY(TEST_STRING1(OP, "q", "", REP));\
     TEST_STRING1(OP, "b", "std", REP);\
     TEST_STRING1(OP, "w", "std", REP);\
-    TEST_STRING1(OP, "l", "std", REP)
+    TEST_STRING1(OP, "l", "std", REP);\
+    X86_64_ONLY(TEST_STRING1(OP, "q", "std", REP))
 
 void test_string(void)
 {
@@ -1169,6 +1370,7 @@ void test_string(void)
    TEST_STRING(cmps, "repnz ");
 }
 
+#ifdef TEST_VM86
 /* VM86 test */
 
 static inline void set_bit(uint8_t *a, unsigned int bit)
@@ -1299,9 +1501,10 @@ void test_vm86(void)
     printf("VM86 end\n");
     munmap(vm86_mem, 0x110000);
 }
+#endif
 
 /* exception tests */
-#ifndef REG_EAX
+#if defined(__i386__) && !defined(REG_EAX)
 #define REG_EAX EAX
 #define REG_EBX EBX
 #define REG_ECX ECX
@@ -1316,6 +1519,10 @@ void test_vm86(void)
 #define REG_ERR ERR
 #endif
 
+#if defined(__x86_64__)
+#define REG_EIP REG_RIP
+#endif
+
 jmp_buf jmp_env;
 int v1;
 int tab[2];
@@ -1330,23 +1537,22 @@ void sig_handler(int sig, siginfo_t *info, void *puc)
            (unsigned long)info->si_addr);
     printf("\n");
 
-    printf("trapno=0x%02x err=0x%08x",
-           uc->uc_mcontext.gregs[REG_TRAPNO],
-           uc->uc_mcontext.gregs[REG_ERR]);
-    printf(" EIP=0x%08x", uc->uc_mcontext.gregs[REG_EIP]);
+    printf("trapno=" FMTLX " err=" FMTLX,
+           (long)uc->uc_mcontext.gregs[REG_TRAPNO],
+           (long)uc->uc_mcontext.gregs[REG_ERR]);
+    printf(" EIP=" FMTLX, (long)uc->uc_mcontext.gregs[REG_EIP]);
     printf("\n");
     longjmp(jmp_env, 1);
 }
 
 void test_exceptions(void)
 {
-    struct modify_ldt_ldt_s ldt;
     struct sigaction act;
     volatile int val;
     
     act.sa_sigaction = sig_handler;
     sigemptyset(&act.sa_mask);
-    act.sa_flags = SA_SIGINFO;
+    act.sa_flags = SA_SIGINFO | SA_NODEFER;
     sigaction(SIGFPE, &act, NULL);
     sigaction(SIGILL, &act, NULL);
     sigaction(SIGSEGV, &act, NULL);
@@ -1361,6 +1567,7 @@ void test_exceptions(void)
         v1 = 2 / v1;
     }
 
+#if !defined(__x86_64__)
     printf("BOUND exception:\n");
     if (setjmp(jmp_env) == 0) {
         /* bound exception */
@@ -1368,7 +1575,9 @@ void test_exceptions(void)
         tab[1] = 10;
         asm volatile ("bound %0, %1" : : "r" (11), "m" (tab[0]));
     }
+#endif
 
+#ifdef TEST_SEGS
     printf("segment exceptions:\n");
     if (setjmp(jmp_env) == 0) {
         /* load an invalid segment */
@@ -1381,21 +1590,25 @@ void test_exceptions(void)
         asm volatile ("movl %0, %%ss" : : "r" (3));
     }
 
-    ldt.entry_number = 1;
-    ldt.base_addr = (unsigned long)&seg_data1;
-    ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
-    ldt.seg_32bit = 1;
-    ldt.contents = MODIFY_LDT_CONTENTS_DATA;
-    ldt.read_exec_only = 0;
-    ldt.limit_in_pages = 1;
-    ldt.seg_not_present = 1;
-    ldt.useable = 1;
-    modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
-
-    if (setjmp(jmp_env) == 0) {
-        /* segment not present */
-        asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
+    {
+        struct modify_ldt_ldt_s ldt;
+        ldt.entry_number = 1;
+        ldt.base_addr = (unsigned long)&seg_data1;
+        ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
+        ldt.seg_32bit = 1;
+        ldt.contents = MODIFY_LDT_CONTENTS_DATA;
+        ldt.read_exec_only = 0;
+        ldt.limit_in_pages = 1;
+        ldt.seg_not_present = 1;
+        ldt.useable = 1;
+        modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
+        
+        if (setjmp(jmp_env) == 0) {
+            /* segment not present */
+            asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
+        }
     }
+#endif
 
     /* test SEGV reporting */
     printf("PF exception:\n");
@@ -1459,11 +1672,13 @@ void test_exceptions(void)
         asm volatile ("cli");
     }
 
+#if !defined(__x86_64__)
     printf("INTO exception:\n");
     if (setjmp(jmp_env) == 0) {
         /* overflow exception */
         asm volatile ("addl $1, %0 ; into" : : "r" (0x7fffffff));
     }
+#endif
 
     printf("OUTB exception:\n");
     if (setjmp(jmp_env) == 0) {
@@ -1502,11 +1717,12 @@ void test_exceptions(void)
     printf("val=0x%x\n", val);
 }
 
+#if !defined(__x86_64__)
 /* specific precise single step test */
 void sig_trap_handler(int sig, siginfo_t *info, void *puc)
 {
     struct ucontext *uc = puc;
-    printf("EIP=0x%08x\n", uc->uc_mcontext.gregs[REG_EIP]);
+    printf("EIP=" FMTLX "\n", (long)uc->uc_mcontext.gregs[REG_EIP]);
 }
 
 const uint8_t sstep_buf1[4] = { 1, 2, 3, 4};
@@ -1627,12 +1843,21 @@ void test_self_modifying_code(void)
         printf("smc_code2(%d) = %d\n", i, smc_code2(i));
     }
 }
+#endif
 
-int enter_stack[4096];
+long enter_stack[4096];
+
+#if defined(__x86_64__)
+#define RSP "%%rsp"
+#define RBP "%%rbp"
+#else
+#define RSP "%%esp"
+#define RBP "%%ebp"
+#endif
 
 #define TEST_ENTER(size, stack_type, level)\
 {\
-    int esp_save, esp_val, ebp_val, ebp_save, i;\
+    long esp_save, esp_val, ebp_val, ebp_save, i;\
     stack_type *ptr, *stack_end, *stack_ptr;\
     memset(enter_stack, 0, sizeof(enter_stack));\
     stack_end = stack_ptr = (stack_type *)(enter_stack + 4096);\
@@ -1640,15 +1865,15 @@ int enter_stack[4096];
     for(i=1;i<=32;i++)\
        *--stack_ptr = i;\
     esp_val = (long)stack_ptr;\
-    asm("movl %%esp, %[esp_save]\n"\
-        "movl %%ebp, %[ebp_save]\n"\
-        "movl %[esp_val], %%esp\n"\
-        "movl %[ebp_val], %%ebp\n"\
-        "enter" size " $12, $" #level "\n"\
-        "movl %%esp, %[esp_val]\n"\
-        "movl %%ebp, %[ebp_val]\n"\
-        "movl %[esp_save], %%esp\n"\
-        "movl %[ebp_save], %%ebp\n"\
+    asm("mov " RSP ", %[esp_save]\n"\
+        "mov " RBP ", %[ebp_save]\n"\
+        "mov %[esp_val], " RSP "\n"\
+        "mov %[ebp_val], " RBP "\n"\
+        "enter" size " $8, $" #level "\n"\
+        "mov " RSP ", %[esp_val]\n"\
+        "mov " RBP ", %[ebp_val]\n"\
+        "mov %[esp_save], " RSP "\n"\
+        "mov %[ebp_save], " RBP "\n"\
         : [esp_save] "=r" (esp_save),\
         [ebp_save] "=r" (ebp_save),\
         [esp_val] "=r" (esp_val),\
@@ -1656,18 +1881,25 @@ int enter_stack[4096];
         :  "[esp_val]" (esp_val),\
         "[ebp_val]" (ebp_val));\
     printf("level=%d:\n", level);\
-    printf("esp_val=0x%08lx\n", esp_val - (long)stack_end);\
-    printf("ebp_val=0x%08lx\n", ebp_val - (long)stack_end);\
+    printf("esp_val=" FMTLX "\n", esp_val - (long)stack_end);\
+    printf("ebp_val=" FMTLX "\n", ebp_val - (long)stack_end);\
     for(ptr = (stack_type *)esp_val; ptr < stack_end; ptr++)\
-        printf("%08x\n", ptr[0]);\
+        printf(FMTLX "\n", (long)ptr[0]);\
 }
 
 static void test_enter(void)
 {
+#if defined(__x86_64__)
+    TEST_ENTER("q", uint64_t, 0);
+    TEST_ENTER("q", uint64_t, 1);
+    TEST_ENTER("q", uint64_t, 2);
+    TEST_ENTER("q", uint64_t, 31);
+#else
     TEST_ENTER("l", uint32_t, 0);
     TEST_ENTER("l", uint32_t, 1);
     TEST_ENTER("l", uint32_t, 2);
     TEST_ENTER("l", uint32_t, 31);
+#endif
 
     TEST_ENTER("w", uint16_t, 0);
     TEST_ENTER("w", uint16_t, 1);
@@ -1698,7 +1930,7 @@ static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
 #define SSE_OP(op)\
 {\
     asm volatile (#op " %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
-    printf("%-9s: a=%016llx%016llx b=%016llx%016llx r=%016llx%016llx\n",\
+    printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
            #op,\
            a.q[1], a.q[0],\
            b.q[1], b.q[0],\
@@ -1724,7 +1956,7 @@ static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
     a.q[0] = test_values[2*i][0];\
     b.q[0] = test_values[2*i+1][0];\
     asm volatile (#op " %2, %0" : "=y" (r.q[0]) : "0" (a.q[0]), "y" (b.q[0]));\
-    printf("%-9s: a=%016llx b=%016llx r=%016llx\n",\
+    printf("%-9s: a=" FMT64X " b=" FMT64X " r=" FMT64X "\n",\
            #op,\
            a.q[0],\
            b.q[0],\
@@ -1740,7 +1972,7 @@ static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
     b.q[0] = test_values[1][0];\
     b.q[1] = test_values[1][1];\
     asm volatile (#op " $" #ib ", %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
-    printf("%-9s: a=%016llx%016llx b=%016llx%016llx ib=%02x r=%016llx%016llx\n",\
+    printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
            #op,\
            a.q[1], a.q[0],\
            b.q[1], b.q[0],\
@@ -1755,7 +1987,7 @@ static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
     a.q[0] = test_values[2*i][0];\
     a.q[1] = test_values[2*i][1];\
     asm volatile (#op " $" #ib ", %1, %0" : "=x" (r.dq) : "x" (a.dq));\
-    printf("%-9s: a=%016llx%016llx ib=%02x r=%016llx%016llx\n",\
+    printf("%-9s: a=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
            #op,\
            a.q[1], a.q[0],\
            ib,\
@@ -1770,7 +2002,7 @@ static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
     a.q[0] = test_values[2*i][0];\
     a.q[1] = test_values[2*i][1];\
     asm volatile (#op " $" #ib ", %0" : "=x" (r.dq) : "0" (a.dq));\
-    printf("%-9s: a=%016llx%016llx ib=%02x r=%016llx%016llx\n",\
+    printf("%-9s: a=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
            #op,\
            a.q[1], a.q[0],\
            ib,\
@@ -1788,7 +2020,7 @@ static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
     b.q[0] = ib;\
     b.q[1] = 0;\
     asm volatile (#op " %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
-    printf("%-9s: a=%016llx%016llx b=%016llx%016llx r=%016llx%016llx\n",\
+    printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
            #op,\
            a.q[1], a.q[0],\
            b.q[1], b.q[0],\
@@ -1803,7 +2035,7 @@ static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
     a.q[0] = test_values[2*i][0];\
     a.q[1] = test_values[2*i][1];\
     asm volatile (#op " %1, %0" : "=r" (reg) : "x" (a.dq));\
-    printf("%-9s: a=%016llx%016llx r=%08x\n",\
+    printf("%-9s: a=" FMT64X "" FMT64X " r=%08x\n",\
            #op,\
            a.q[1], a.q[0],\
            reg);\
@@ -1845,7 +2077,7 @@ void test_sse_comi(double a1, double b1)
 #define CVT_OP_XMM(op)\
 {\
     asm volatile (#op " %1, %0" : "=x" (r.dq) : "x" (a.dq));\
-    printf("%-9s: a=%016llx%016llx r=%016llx%016llx\n",\
+    printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
            #op,\
            a.q[1], a.q[0],\
            r.q[1], r.q[0]);\
@@ -1854,7 +2086,7 @@ void test_sse_comi(double a1, double b1)
 #define CVT_OP_XMM2MMX(op)\
 {\
     asm volatile (#op " %1, %0" : "=y" (r.q[0]) : "x" (a.dq));\
-    printf("%-9s: a=%016llx%016llx r=%016llx\n",\
+    printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "\n",\
            #op,\
            a.q[1], a.q[0],\
            r.q[0]);\
@@ -1863,7 +2095,7 @@ void test_sse_comi(double a1, double b1)
 #define CVT_OP_MMX2XMM(op)\
 {\
     asm volatile (#op " %1, %0" : "=x" (r.dq) : "y" (a.q[0]));\
-    printf("%-9s: a=%016llx r=%016llx%016llx\n",\
+    printf("%-9s: a=" FMT64X " r=" FMT64X "" FMT64X "\n",\
            #op,\
            a.q[0],\
            r.q[1], r.q[0]);\
@@ -1872,7 +2104,7 @@ void test_sse_comi(double a1, double b1)
 #define CVT_OP_REG2XMM(op)\
 {\
     asm volatile (#op " %1, %0" : "=x" (r.dq) : "r" (a.l[0]));\
-    printf("%-9s: a=%08x r=%016llx%016llx\n",\
+    printf("%-9s: a=%08x r=" FMT64X "" FMT64X "\n",\
            #op,\
            a.l[0],\
            r.q[1], r.q[0]);\
@@ -1881,7 +2113,7 @@ void test_sse_comi(double a1, double b1)
 #define CVT_OP_XMM2REG(op)\
 {\
     asm volatile (#op " %1, %0" : "=r" (r.l[0]) : "x" (a.dq));\
-    printf("%-9s: a=%016llx%016llx r=%08x\n",\
+    printf("%-9s: a=" FMT64X "" FMT64X " r=%08x\n",\
            #op,\
            a.q[1], a.q[0],\
            r.l[0]);\
@@ -1912,7 +2144,7 @@ void test_fxsave(void)
 {
     struct fpxstate *fp = &fpx_state;
     struct fpxstate *fp2 = &fpx_state2;
-    int i;
+    int i, nb_xmm;
     XMMReg a, b;
     a.q[0] = test_values[0][0];
     a.q[1] = test_values[0][1];
@@ -1921,6 +2153,9 @@ void test_fxsave(void)
 
     asm("movdqa %2, %%xmm0\n"
         "movdqa %3, %%xmm7\n"
+#if defined(__x86_64__)
+        "movdqa %2, %%xmm15\n"
+#endif
         " fld1\n"
         " fldpi\n"
         " fldln2\n"
@@ -1934,14 +2169,19 @@ void test_fxsave(void)
     printf("fpus=%04x\n", fp->fpus);
     printf("fptag=%04x\n", fp->fptag);
     for(i = 0; i < 3; i++) {
-        printf("ST%d: %016llx %04x\n",
+        printf("ST%d: " FMT64X " %04x\n",
                i, 
                *(uint64_t *)&fp->fpregs1[i * 16],
                *(uint16_t *)&fp->fpregs1[i * 16 + 8]);
     }
     printf("mxcsr=%08x\n", fp->mxcsr & 0x1f80);
-    for(i = 0; i < 8; i++) {
-        printf("xmm%d: %016llx%016llx\n",
+#if defined(__x86_64__)
+    nb_xmm = 16;
+#else
+    nb_xmm = 8;
+#endif
+    for(i = 0; i < nb_xmm; i++) {
+        printf("xmm%d: " FMT64X "" FMT64X "\n",
                i, 
                *(uint64_t *)&fp->xmm_regs[i * 16],
                *(uint64_t *)&fp->xmm_regs[i * 16 + 8]);
@@ -2005,10 +2245,10 @@ void test_sse(void)
     MMX_OP2(pavgw);
 
     asm volatile ("pinsrw $1, %1, %0" : "=y" (r.q[0]) : "r" (0x12345678));
-    printf("%-9s: r=%016llx\n", "pinsrw", r.q[0]);
+    printf("%-9s: r=" FMT64X "\n", "pinsrw", r.q[0]);
 
     asm volatile ("pinsrw $5, %1, %0" : "=x" (r.dq) : "r" (0x12345678));
-    printf("%-9s: r=%016llx%016llx\n", "pinsrw", r.q[1], r.q[0]);
+    printf("%-9s: r=" FMT64X "" FMT64X "\n", "pinsrw", r.q[1], r.q[0]);
 
     a.q[0] = test_values[0][0];
     a.q[1] = test_values[0][1];
@@ -2035,7 +2275,7 @@ void test_sse(void)
         asm volatile("maskmovq %1, %0" : 
                      : "y" (a.q[0]), "y" (b.q[0]), "D" (&r)
                      : "memory"); 
-        printf("%-9s: r=%016llx a=%016llx b=%016llx\n", 
+        printf("%-9s: r=" FMT64X " a=" FMT64X " b=" FMT64X "\n", 
                "maskmov", 
                r.q[0], 
                a.q[0], 
@@ -2043,7 +2283,7 @@ void test_sse(void)
         asm volatile("maskmovdqu %1, %0" : 
                      : "x" (a.dq), "x" (b.dq), "D" (&r)
                      : "memory"); 
-        printf("%-9s: r=%016llx%016llx a=%016llx%016llx b=%016llx%016llx\n", 
+        printf("%-9s: r=" FMT64X "" FMT64X " a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X "\n", 
                "maskmov", 
                r.q[1], r.q[0], 
                a.q[1], a.q[0], 
@@ -2205,15 +2445,17 @@ void test_sse(void)
 
 #endif
 
-static void *call_end __init_call = NULL;
+extern void *__start_initcall;
+extern void *__stop_initcall;
+
 
 int main(int argc, char **argv)
 {
     void **ptr;
     void (*func)(void);
 
-    ptr = &call_start + 1;
-    while (*ptr != NULL) {
+    ptr = &__start_initcall;
+    while (ptr != &__stop_initcall) {
         func = *ptr++;
         func();
     }
@@ -2221,19 +2463,25 @@ int main(int argc, char **argv)
     test_mul();
     test_jcc();
     test_floats();
+#if !defined(__x86_64__)
     test_bcd();
+#endif
     test_xchg();
     test_string();
     test_misc();
     test_lea();
+#ifdef TEST_SEGS
     test_segs();
     test_code16();
+#endif
 #ifdef TEST_VM86
     test_vm86();
 #endif
     test_exceptions();
+#if !defined(__x86_64__)
     test_self_modifying_code();
     test_single_step();
+#endif
     test_enter();
 #ifdef TEST_SSE
     test_sse();
diff --git a/tests/test-i386.h b/tests/test-i386.h
index 7d1812c883..75106b8ce2 100644
--- a/tests/test-i386.h
+++ b/tests/test-i386.h
@@ -1,95 +1,116 @@
 
 #define exec_op glue(exec_, OP)
+#define exec_opq glue(glue(exec_, OP), q)
 #define exec_opl glue(glue(exec_, OP), l)
 #define exec_opw glue(glue(exec_, OP), w)
 #define exec_opb glue(glue(exec_, OP), b)
 
-#define EXECOP2(size, res, s1, flags) \
+#define EXECOP2(size, rsize, res, s1, flags) \
     asm ("push %4\n\t"\
          "popf\n\t"\
-         stringify(OP) size " %" size "2, %" size "0\n\t" \
+         stringify(OP) size " %" rsize "2, %" rsize "0\n\t" \
          "pushf\n\t"\
-         "popl %1\n\t"\
+         "pop %1\n\t"\
          : "=q" (res), "=g" (flags)\
-         : "q" (s1), "0" (res), "1" (flags));
+         : "q" (s1), "0" (res), "1" (flags)); \
+    printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n", \
+           stringify(OP) size, s0, s1, res, iflags, flags & CC_MASK);
 
-#define EXECOP1(size, res, flags) \
+#define EXECOP1(size, rsize, res, flags) \
     asm ("push %3\n\t"\
          "popf\n\t"\
-         stringify(OP) size " %" size "0\n\t" \
+         stringify(OP) size " %" rsize "0\n\t" \
          "pushf\n\t"\
-         "popl %1\n\t"\
+         "pop %1\n\t"\
          : "=q" (res), "=g" (flags)\
-         : "0" (res), "1" (flags));
+         : "0" (res), "1" (flags)); \
+    printf("%-10s A=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n", \
+           stringify(OP) size, s0, res, iflags, flags & CC_MASK);
 
 #ifdef OP1
-void exec_opl(int s0, int s1, int iflags)
+#if defined(__x86_64__)
+void exec_opq(long s0, long s1, long iflags)
 {
-    int res, flags;
+    long res, flags;
     res = s0;
     flags = iflags;
-    EXECOP1("", res, flags);
-    printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",
-           stringify(OP) "l", s0, res, iflags, flags & CC_MASK);
+    EXECOP1("q", "", res, flags);
 }
+#endif
 
-void exec_opw(int s0, int s1, int iflags)
+void exec_opl(long s0, long s1, long iflags)
 {
-    int res, flags;
+    long res, flags;
     res = s0;
     flags = iflags;
-    EXECOP1("w", res, flags);
-    printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",
-           stringify(OP) "w", s0, res, iflags, flags & CC_MASK);
+    EXECOP1("l", "k", res, flags);
 }
 
-void exec_opb(int s0, int s1, int iflags)
+void exec_opw(long s0, long s1, long iflags)
 {
-    int res, flags;
+    long res, flags;
     res = s0;
     flags = iflags;
-    EXECOP1("b", res, flags);
-    printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",
-           stringify(OP) "b", s0, res, iflags, flags & CC_MASK);
+    EXECOP1("w", "w", res, flags);
+}
+
+void exec_opb(long s0, long s1, long iflags)
+{
+    long res, flags;
+    res = s0;
+    flags = iflags;
+    EXECOP1("b", "b", res, flags);
 }
 #else
-void exec_opl(int s0, int s1, int iflags)
+#if defined(__x86_64__)
+void exec_opq(long s0, long s1, long iflags)
+{
+    long res, flags;
+    res = s0;
+    flags = iflags;
+    EXECOP2("q", "", res, s1, flags);
+}
+#endif
+
+void exec_opl(long s0, long s1, long iflags)
 {
-    int res, flags;
+    long res, flags;
     res = s0;
     flags = iflags;
-    EXECOP2("", res, s1, flags);
-    printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
-           stringify(OP) "l", s0, s1, res, iflags, flags & CC_MASK);
+    EXECOP2("l", "k", res, s1, flags);
 }
 
-void exec_opw(int s0, int s1, int iflags)
+void exec_opw(long s0, long s1, long iflags)
 {
-    int res, flags;
+    long res, flags;
     res = s0;
     flags = iflags;
-    EXECOP2("w", res, s1, flags);
-    printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
-           stringify(OP) "w", s0, s1, res, iflags, flags & CC_MASK);
+    EXECOP2("w", "w", res, s1, flags);
 }
 
-void exec_opb(int s0, int s1, int iflags)
+void exec_opb(long s0, long s1, long iflags)
 {
-    int res, flags;
+    long res, flags;
     res = s0;
     flags = iflags;
-    EXECOP2("b", res, s1, flags);
-    printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
-           stringify(OP) "b", s0, s1, res, iflags, flags & CC_MASK);
+    EXECOP2("b", "b", res, s1, flags);
 }
 #endif
 
-void exec_op(int s0, int s1)
+void exec_op(long s0, long s1)
 {
+    s0 = i2l(s0);
+    s1 = i2l(s1);
+#if defined(__x86_64__)
+    exec_opq(s0, s1, 0);
+#endif
     exec_opl(s0, s1, 0);
     exec_opw(s0, s1, 0);
     exec_opb(s0, s1, 0);
 #ifdef OP_CC
+#if defined(__x86_64__)
+    exec_opq(s0, s1, CC_C);
+#endif
     exec_opl(s0, s1, CC_C);
     exec_opw(s0, s1, CC_C);
     exec_opb(s0, s1, CC_C);