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author | Peter Maydell <peter.maydell@linaro.org> | 2016-10-12 18:54:33 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2016-10-17 19:32:44 +0100 |
commit | 5dbdc4342f479d799a1970dd5fd22e64c9dcd50d (patch) | |
tree | 03e1d6a7478376193c1bd4284d9662c6d2eb0073 | |
parent | fb0e8e79a9d77ee240dbca036fa8698ce654e5d1 (diff) | |
download | qemu-5dbdc4342f479d799a1970dd5fd22e64c9dcd50d.tar.gz qemu-5dbdc4342f479d799a1970dd5fd22e64c9dcd50d.tar.bz2 qemu-5dbdc4342f479d799a1970dd5fd22e64c9dcd50d.zip |
target-arm: Implement dummy MDCCINT_EL1
MDCCINT_EL1 is part of the DCC debugger communication
channel between the CPU and an attached external debugger.
QEMU doesn't implement this, but since Linux may try
to access this register we need to provide at least
a dummy implementation.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1476294876-12340-2-git-send-email-peter.maydell@linaro.org
-rw-r--r-- | target-arm/helper.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index 70e274221c..a65f4f2f1f 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -4060,6 +4060,14 @@ static const ARMCPRegInfo debug_cp_reginfo[] = { .cp = 14, .opc1 = 0, .crn = 0, .crm = 7, .opc2 = 0, .access = PL1_RW, .accessfn = access_tda, .type = ARM_CP_NOP }, + /* Dummy MDCCINT_EL1, since we don't implement the Debug Communications + * Channel but Linux may try to access this register. The 32-bit + * alias is DBGDCCINT. + */ + { .name = "MDCCINT_EL1", .state = ARM_CP_STATE_BOTH, + .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 0, + .access = PL1_RW, .accessfn = access_tda, + .type = ARM_CP_NOP }, REGINFO_SENTINEL }; |