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authorPeter Maydell <peter.maydell@linaro.org>2016-05-24 10:19:45 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-05-24 10:19:45 +0100
commit4c63a818de8d77bda3332c890fc52d900ebb2db1 (patch)
treebcd9a6d20787db195db178931db7758dc9b761fa
parentc9158547617584bb9d19db7fb139998fbef80133 (diff)
parentea4d824168ce2a309ccf26fa20c6e4f9e3d47c82 (diff)
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Merge remote-tracking branch 'remotes/xtensa/tags/20160523-opencores_eth' into staging
opencores_eth cleanups: - use mii.h - reduce stack usage in open_eth_start_xmit. # gpg: Signature made Mon 23 May 2016 20:14:20 BST using RSA key ID F83FA044 # gpg: Good signature from "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" * remotes/xtensa/tags/20160523-opencores_eth: hw/net/opencores_eth: Allocating Large sized arrays to heap hw/net/opencores_eth: use mii.h Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--hw/net/opencores_eth.c44
1 files changed, 26 insertions, 18 deletions
diff --git a/hw/net/opencores_eth.c b/hw/net/opencores_eth.c
index c6094fbb56..484d113eb6 100644
--- a/hw/net/opencores_eth.c
+++ b/hw/net/opencores_eth.c
@@ -33,6 +33,7 @@
#include "qemu/osdep.h"
#include "hw/hw.h"
+#include "hw/net/mii.h"
#include "hw/sysbus.h"
#include "net/net.h"
#include "sysemu/sysemu.h"
@@ -55,12 +56,6 @@
/* PHY MII registers */
enum {
- MII_BMCR,
- MII_BMSR,
- MII_PHYIDR1,
- MII_PHYIDR2,
- MII_ANAR,
- MII_ANLPAR,
MII_REG_MAX = 16,
};
@@ -72,10 +67,11 @@ typedef struct Mii {
static void mii_set_link(Mii *s, bool link_ok)
{
if (link_ok) {
- s->regs[MII_BMSR] |= 0x4;
- s->regs[MII_ANLPAR] |= 0x01e1;
+ s->regs[MII_BMSR] |= MII_BMSR_LINK_ST;
+ s->regs[MII_ANLPAR] |= MII_ANLPAR_TXFD | MII_ANLPAR_TX |
+ MII_ANLPAR_10FD | MII_ANLPAR_10 | MII_ANLPAR_CSMACD;
} else {
- s->regs[MII_BMSR] &= ~0x4;
+ s->regs[MII_BMSR] &= ~MII_BMSR_LINK_ST;
s->regs[MII_ANLPAR] &= 0x01ff;
}
s->link_ok = link_ok;
@@ -84,11 +80,14 @@ static void mii_set_link(Mii *s, bool link_ok)
static void mii_reset(Mii *s)
{
memset(s->regs, 0, sizeof(s->regs));
- s->regs[MII_BMCR] = 0x1000;
- s->regs[MII_BMSR] = 0x7868; /* no ext regs */
- s->regs[MII_PHYIDR1] = 0x2000;
- s->regs[MII_PHYIDR2] = 0x5c90;
- s->regs[MII_ANAR] = 0x01e1;
+ s->regs[MII_BMCR] = MII_BMCR_AUTOEN;
+ s->regs[MII_BMSR] = MII_BMSR_100TX_FD | MII_BMSR_100TX_HD |
+ MII_BMSR_10T_FD | MII_BMSR_10T_HD | MII_BMSR_MFPS |
+ MII_BMSR_AN_COMP | MII_BMSR_AUTONEG;
+ s->regs[MII_PHYID1] = 0x2000;
+ s->regs[MII_PHYID2] = 0x5c90;
+ s->regs[MII_ANAR] = MII_ANAR_TXFD | MII_ANAR_TX |
+ MII_ANAR_10FD | MII_ANAR_10 | MII_ANAR_CSMACD;
mii_set_link(s, s->link_ok);
}
@@ -98,7 +97,7 @@ static void mii_ro(Mii *s, uint16_t v)
static void mii_write_bmcr(Mii *s, uint16_t v)
{
- if (v & 0x8000) {
+ if (v & MII_BMCR_RESET) {
mii_reset(s);
} else {
s->regs[MII_BMCR] = v;
@@ -110,8 +109,8 @@ static void mii_write_host(Mii *s, unsigned idx, uint16_t v)
static void (*reg_write[MII_REG_MAX])(Mii *s, uint16_t v) = {
[MII_BMCR] = mii_write_bmcr,
[MII_BMSR] = mii_ro,
- [MII_PHYIDR1] = mii_ro,
- [MII_PHYIDR2] = mii_ro,
+ [MII_PHYID1] = mii_ro,
+ [MII_PHYID2] = mii_ro,
};
if (idx < MII_REG_MAX) {
@@ -483,7 +482,8 @@ static NetClientInfo net_open_eth_info = {
static void open_eth_start_xmit(OpenEthState *s, desc *tx)
{
- uint8_t buf[65536];
+ uint8_t *buf = NULL;
+ uint8_t buffer[0x600];
unsigned len = GET_FIELD(tx->len_flags, TXD_LEN);
unsigned tx_len = len;
@@ -498,6 +498,11 @@ static void open_eth_start_xmit(OpenEthState *s, desc *tx)
trace_open_eth_start_xmit(tx->buf_ptr, len, tx_len);
+ if (tx_len > sizeof(buffer)) {
+ buf = g_new(uint8_t, tx_len);
+ } else {
+ buf = buffer;
+ }
if (len > tx_len) {
len = tx_len;
}
@@ -506,6 +511,9 @@ static void open_eth_start_xmit(OpenEthState *s, desc *tx)
memset(buf + len, 0, tx_len - len);
}
qemu_send_packet(qemu_get_queue(s->nic), buf, tx_len);
+ if (tx_len > sizeof(buffer)) {
+ g_free(buf);
+ }
if (tx->len_flags & TXD_WR) {
s->tx_desc = 0;