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| author | Peter Maydell <peter.maydell@linaro.org> | 2012-07-12 10:59:03 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-07-12 10:59:53 +0000 |
| commit | 3cc0cd61f4adfecf2c0de392fe61a7e323e496ba (patch) | |
| tree | 85a8191289fb5a5af546ff65eea66df427fabf69 | |
| parent | 40291d61461c4619928a83a640205d71c72b155a (diff) | |
| download | qemu-3cc0cd61f4adfecf2c0de392fe61a7e323e496ba.tar.gz qemu-3cc0cd61f4adfecf2c0de392fe61a7e323e496ba.tar.bz2 qemu-3cc0cd61f4adfecf2c0de392fe61a7e323e496ba.zip | |
ARM: Make target_phys_addr_t 64 bits and physaddrs 40 bits
Make target_phys_addr_t 64 bits for ARM targets, and set
TARGET_PHYS_ADDR_SPACE_BITS to 40. This should have no effect for ARM
boards where physical addresses really are 32 bits (except perhaps a
slight performance hit on 32 bit hosts for system emulation) but allows
us to implement the Large Physical Address Extensions for Cortex-A15,
which mean 40 bit physical addresses.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rwxr-xr-x | configure | 2 | ||||
| -rw-r--r-- | target-arm/cpu.h | 2 |
2 files changed, 2 insertions, 2 deletions
@@ -3571,7 +3571,7 @@ case "$target_arch2" in bflt="yes" target_nptl="yes" gdb_xml_files="arm-core.xml arm-vfp.xml arm-vfp3.xml arm-neon.xml" - target_phys_bits=32 + target_phys_bits=64 target_llong_alignment=4 target_libs_softmmu="$fdt_libs" ;; diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 33afa185e9..aadfca0a26 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -619,7 +619,7 @@ static inline bool cp_access_ok(CPUARMState *env, #define TARGET_PAGE_BITS 10 #endif -#define TARGET_PHYS_ADDR_SPACE_BITS 32 +#define TARGET_PHYS_ADDR_SPACE_BITS 40 #define TARGET_VIRT_ADDR_SPACE_BITS 32 static inline CPUARMState *cpu_init(const char *cpu_model) |