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author | Hu Tao <hutao@cn.fujitsu.com> | 2013-04-26 11:24:46 +0800 |
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committer | Anthony Liguori <aliguori@us.ibm.com> | 2013-04-30 10:30:01 -0500 |
commit | 3ab135f3462af4c523a4b5969f9d6c67b2ac427a (patch) | |
tree | 185af1c5186fc74f6d74817ae3c40c2fadf05521 | |
parent | b42ffe60d8b510cd2f76ef50f6a1057f91a3dd34 (diff) | |
download | qemu-3ab135f3462af4c523a4b5969f9d6c67b2ac427a.tar.gz qemu-3ab135f3462af4c523a4b5969f9d6c67b2ac427a.tar.bz2 qemu-3ab135f3462af4c523a4b5969f9d6c67b2ac427a.zip |
pvpanic: create pvpanic by default for machine 1.5
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Message-id: f840042f0e1205041f8feaf0d39ca639884f3a00.1366945969.git.hutao@cn.fujitsu.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
-rw-r--r-- | hw/i386/pc_piix.c | 12 | ||||
-rw-r--r-- | hw/i386/pc_q35.c | 7 | ||||
-rw-r--r-- | hw/misc/pvpanic.c | 7 | ||||
-rw-r--r-- | include/hw/i386/pc.h | 3 |
4 files changed, 29 insertions, 0 deletions
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 2bda79e631..852d63ba2e 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -55,6 +55,8 @@ static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; +static bool has_pvpanic = true; + /* PC hardware initialisation */ static void pc_init1(MemoryRegion *system_memory, MemoryRegion *system_io, @@ -216,6 +218,10 @@ static void pc_init1(MemoryRegion *system_memory, if (pci_enabled) { pc_pci_device_init(pci_bus); } + + if (has_pvpanic) { + pvpanic_init(isa_bus); + } } static void pc_init_pci(QEMUMachineInitArgs *args) @@ -236,6 +242,7 @@ static void pc_init_pci(QEMUMachineInitArgs *args) static void pc_init_pci_1_4(QEMUMachineInitArgs *args) { pc_sysfw_flash_vs_rom_bug_compatible = true; + has_pvpanic = false; pc_init_pci(args); } @@ -243,6 +250,7 @@ static void pc_init_pci_1_3(QEMUMachineInitArgs *args) { enable_compat_apic_id_mode(); pc_sysfw_flash_vs_rom_bug_compatible = true; + has_pvpanic = false; pc_init_pci(args); } @@ -252,6 +260,7 @@ static void pc_init_pci_1_2(QEMUMachineInitArgs *args) disable_kvm_pv_eoi(); enable_compat_apic_id_mode(); pc_sysfw_flash_vs_rom_bug_compatible = true; + has_pvpanic = false; pc_init_pci(args); } @@ -260,6 +269,7 @@ static void pc_init_pci_1_0(QEMUMachineInitArgs *args) { disable_kvm_pv_eoi(); enable_compat_apic_id_mode(); + has_pvpanic = false; pc_init_pci(args); } @@ -272,6 +282,7 @@ static void pc_init_pci_no_kvmclock(QEMUMachineInitArgs *args) const char *kernel_cmdline = args->kernel_cmdline; const char *initrd_filename = args->initrd_filename; const char *boot_device = args->boot_device; + has_pvpanic = false; disable_kvm_pv_eoi(); enable_compat_apic_id_mode(); pc_init1(get_system_memory(), @@ -289,6 +300,7 @@ static void pc_init_isa(QEMUMachineInitArgs *args) const char *kernel_cmdline = args->kernel_cmdline; const char *initrd_filename = args->initrd_filename; const char *boot_device = args->boot_device; + has_pvpanic = false; if (cpu_model == NULL) cpu_model = "486"; disable_kvm_pv_eoi(); diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index d445bdf4ca..d094041462 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -45,6 +45,8 @@ /* ICH9 AHCI has 6 ports */ #define MAX_SATA_PORTS 6 +static bool has_pvpanic = true; + /* PC hardware initialisation */ static void pc_q35_init(QEMUMachineInitArgs *args) { @@ -193,11 +195,16 @@ static void pc_q35_init(QEMUMachineInitArgs *args) if (pci_enabled) { pc_pci_device_init(host_bus); } + + if (has_pvpanic) { + pvpanic_init(isa_bus); + } } static void pc_q35_init_1_4(QEMUMachineInitArgs *args) { pc_sysfw_flash_vs_rom_bug_compatible = true; + has_pvpanic = false; pc_q35_init(args); } diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c index a80fae5fb8..31e1b1d8e3 100644 --- a/hw/misc/pvpanic.c +++ b/hw/misc/pvpanic.c @@ -19,6 +19,7 @@ #include "qemu/log.h" #include "hw/nvram/fw_cfg.h" +#include "hw/i386/pc.h" /* The bit of supported pv event */ #define PVPANIC_F_PANICKED 0 @@ -107,6 +108,12 @@ static int pvpanic_isa_initfn(ISADevice *dev) return 0; } +int pvpanic_init(ISABus *bus) +{ + isa_create_simple(bus, TYPE_ISA_PVPANIC_DEVICE); + return 0; +} + static Property pvpanic_isa_properties[] = { DEFINE_PROP_UINT16("ioport", PVPanicState, ioport, 0x505), DEFINE_PROP_END_OF_LIST(), diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 14b504c74d..dd6bc249bf 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -171,6 +171,9 @@ static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) extern bool pc_sysfw_flash_vs_rom_bug_compatible; void pc_system_firmware_init(MemoryRegion *rom_memory); +/* pvpanic.c */ +int pvpanic_init(ISABus *bus); + /* e820 types */ #define E820_RAM 1 #define E820_RESERVED 2 |