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authorThomas Huth <thuth@redhat.com>2016-10-17 19:22:17 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-10-17 19:22:17 +0100
commit04bb79d1f519ae190acf836ff9e07bef5086fad0 (patch)
tree96b8fcd809b1bed779b283a6e63b62193566ec8b
parent4c8afda7d2864023047d466eddd1e8f73a6b072c (diff)
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hw/dma/pl080: Fix bad bit mask (PL080_CONF_M1 | PL080_CONF_M1)
The M1 and M2 bits are both used for configuring the endianness of the AHB master interfaces, so the second PL080_CONF_M1 should be PL080_CONF_M2 instead. Buglink: https://bugs.launchpad.net/qemu/+bug/1631773 Signed-off-by: Thomas Huth <thuth@redhat.com> Message-id: 1476274451-26567-1-git-send-email-thuth@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--hw/dma/pl080.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/dma/pl080.c b/hw/dma/pl080.c
index 3bed5c3390..7724c93b8f 100644
--- a/hw/dma/pl080.c
+++ b/hw/dma/pl080.c
@@ -351,7 +351,7 @@ static void pl080_write(void *opaque, hwaddr offset,
break;
case 12: /* Configuration */
s->conf = value;
- if (s->conf & (PL080_CONF_M1 | PL080_CONF_M1)) {
+ if (s->conf & (PL080_CONF_M1 | PL080_CONF_M2)) {
qemu_log_mask(LOG_UNIMP,
"pl080_write: Big-endian DMA not implemented\n");
}