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author | Dongkyun Son <dongkyun.s@samsung.com> | 2019-11-20 15:16:32 +0900 |
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committer | Dongkyun Son <dongkyun.s@samsung.com> | 2019-11-27 13:11:44 +0900 |
commit | 19759c43f836bd477371486fec69b9b2002cbf83 (patch) | |
tree | 373b7eff366b6dc400fdee41bc2a8245680f07bc | |
parent | cbe8626b2c3364ec78e5650c0f102d8c1af3cbbe (diff) | |
download | obs-19759c43f836bd477371486fec69b9b2002cbf83.tar.gz obs-19759c43f836bd477371486fec69b9b2002cbf83.tar.bz2 obs-19759c43f836bd477371486fec69b9b2002cbf83.zip |
Add -mstackrealign option to ix86 build
To support compilation with SSE instuctions(that are requires 16-alinging)
applying -mstackrealign is perfectly fine, the %ebp will be 16-aligned in the
function prologue.
According to definition on "Intel 386 and AMD x86-64 Options":
Realign the stack at entry. On the Intel x86, the -mstackrealign option
will generate an alternate prologue and epilogue that realigns the
runtime stack if necessary. This supports mixing legacy codes that keep
a 4-byte aligned stack with modern codes that keep a 16-byte stack for
SSE compatibility. See also the attribute force_align_arg_pointer,
applicable to individual functions.
Change-Id: Ifd4fdd397e7911148bbad6c3b53f993ccd14cc06
Signed-off-by: Mikhail Kashkarov <m.kashkarov@partner.samsung.com>
Signed-off-by: Dongkyun Son <dongkyun.s@samsung.com>
-rw-r--r-- | Tizen:5.5:Base/_config | 2 | ||||
-rw-r--r-- | Tizen:Base/_config | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/Tizen:5.5:Base/_config b/Tizen:5.5:Base/_config index 174ad87..fc8ddae 100644 --- a/Tizen:5.5:Base/_config +++ b/Tizen:5.5:Base/_config @@ -208,4 +208,4 @@ Substitute: glibc-devel-32bit Optflags: armv7l %{__global_cflags} --param=ssp-buffer-size=4 -march=armv7-a -mtune=cortex-a8 -mlittle-endian -mfpu=neon -mfloat-abi=softfp -mthumb -Wp,-D__SOFTFP__ -Wl,-O1 -Wl,--hash-style=gnu -Wa,-mimplicit-it=thumb Optflags: aarch64 %{__global_cflags} -feliminate-unused-debug-types -Wformat -march=armv8-a+fp+simd+crc+crypto -mtune=cortex-a57.cortex-a53 Optflags: i686 %{__global_cflags} -feliminate-unused-debug-types --param=ssp-buffer-size=4 -fdiagnostics-color=never -m32 -march=i686 -mtune=i686 -msse4.2 -mfpmath=sse -fasynchronous-unwind-tables -fno-omit-frame-pointer -Optflags: x86_64 %{__global_cflags} -feliminate-unused-debug-types --param=ssp-buffer-size=4 -fdiagnostics-color=never -m64 -march=nehalem -msse4.2 -mfpmath=sse -fasynchronous-unwind-tables -fno-omit-frame-pointer +Optflags: x86_64 %{__global_cflags} -feliminate-unused-debug-types --param=ssp-buffer-size=4 -fdiagnostics-color=never -m64 -march=nehalem -msse4.2 -mfpmath=sse -fasynchronous-unwind-tables -fno-omit-frame-pointer -mstackrealign diff --git a/Tizen:Base/_config b/Tizen:Base/_config index 174ad87..8822d4e 100644 --- a/Tizen:Base/_config +++ b/Tizen:Base/_config @@ -207,5 +207,5 @@ Substitute: glibc-devel-32bit Optflags: armv7l %{__global_cflags} --param=ssp-buffer-size=4 -march=armv7-a -mtune=cortex-a8 -mlittle-endian -mfpu=neon -mfloat-abi=softfp -mthumb -Wp,-D__SOFTFP__ -Wl,-O1 -Wl,--hash-style=gnu -Wa,-mimplicit-it=thumb Optflags: aarch64 %{__global_cflags} -feliminate-unused-debug-types -Wformat -march=armv8-a+fp+simd+crc+crypto -mtune=cortex-a57.cortex-a53 -Optflags: i686 %{__global_cflags} -feliminate-unused-debug-types --param=ssp-buffer-size=4 -fdiagnostics-color=never -m32 -march=i686 -mtune=i686 -msse4.2 -mfpmath=sse -fasynchronous-unwind-tables -fno-omit-frame-pointer +Optflags: i686 %{__global_cflags} -feliminate-unused-debug-types --param=ssp-buffer-size=4 -fdiagnostics-color=never -m32 -march=i686 -mtune=i686 -msse4.2 -mfpmath=sse -fasynchronous-unwind-tables -fno-omit-frame-pointer -mstackrealign Optflags: x86_64 %{__global_cflags} -feliminate-unused-debug-types --param=ssp-buffer-size=4 -fdiagnostics-color=never -m64 -march=nehalem -msse4.2 -mfpmath=sse -fasynchronous-unwind-tables -fno-omit-frame-pointer |