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| author | root <root@xiaowei-hsw.(none)> | 2012-10-18 09:51:49 +0800 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2012-10-29 12:39:34 +0800 |
| commit | 8e9991edb66b1ace51615c6f6ea13c39ea2313a3 (patch) | |
| tree | 99bae4ff482f4b2c9dc7a62f7f9f9479bb05f16e | |
| parent | f033e72cc4a4e3ae2e84fa80be7b311f75f2c542 (diff) | |
| download | vaapi-intel-driver-8e9991edb66b1ace51615c6f6ea13c39ea2313a3.tar.gz vaapi-intel-driver-8e9991edb66b1ace51615c6f6ea13c39ea2313a3.tar.bz2 vaapi-intel-driver-8e9991edb66b1ace51615c6f6ea13c39ea2313a3.zip | |
Add special macro and command for vebox batch buffer execution.
Signed-off-by Li,Xiaowei <xiaowei.a.li@intel.com>
| -rwxr-xr-x | src/i965_defines.h | 11 | ||||
| -rw-r--r-- | src/intel_batchbuffer.c | 27 | ||||
| -rw-r--r-- | src/intel_batchbuffer.h | 4 |
3 files changed, 36 insertions, 6 deletions
diff --git a/src/i965_defines.h b/src/i965_defines.h index cf9babd..0a5a737 100755 --- a/src/i965_defines.h +++ b/src/i965_defines.h @@ -324,6 +324,17 @@ #define MFD_JPEG_BSD_OBJECT MFX(2, 7, 1, 8) +#define VEB(pipeline, op, sub_opa, sub_opb) \ + (3 << 29 | \ + (pipeline) << 27 | \ + (op) << 24 | \ + (sub_opa) << 21 | \ + (sub_opb) << 16) + +#define VEB_SURFACE_STATE VEB(2, 4, 0, 0) +#define VEB_STATE VEB(2, 4, 0, 2) +#define VEB_DNDI_IECP_STATE VEB(2, 4, 0, 3) + #define I965_DEPTHFORMAT_D32_FLOAT 1 #define BASE_ADDRESS_MODIFY (1 << 0) diff --git a/src/intel_batchbuffer.c b/src/intel_batchbuffer.c index 14c9452..6ae1a35 100644 --- a/src/intel_batchbuffer.c +++ b/src/intel_batchbuffer.c @@ -39,7 +39,8 @@ intel_batchbuffer_reset(struct intel_batchbuffer *batch) assert(batch->flag == I915_EXEC_RENDER || batch->flag == I915_EXEC_BLT || - batch->flag == I915_EXEC_BSD); + batch->flag == I915_EXEC_BSD || + batch->flag == I915_EXEC_VEBOX); dri_bo_unreference(batch->buffer); batch->buffer = dri_bo_alloc(intel->bufmgr, @@ -68,7 +69,8 @@ intel_batchbuffer_new(struct intel_driver_data *intel, int flag) struct intel_batchbuffer *batch = calloc(1, sizeof(*batch)); assert(flag == I915_EXEC_RENDER || flag == I915_EXEC_BSD || - flag == I915_EXEC_BLT); + flag == I915_EXEC_BLT || + flag == I915_EXEC_VEBOX); batch->intel = intel; batch->flag = flag; @@ -188,6 +190,13 @@ intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch) OUT_BLT_BATCH(batch, 0); OUT_BLT_BATCH(batch, 0); ADVANCE_BLT_BATCH(batch); + }else if (batch->flag == I915_EXEC_VEBOX) { + BEGIN_VEB_BATCH(batch, 4); + OUT_VEB_BATCH(batch, MI_FLUSH_DW); + OUT_VEB_BATCH(batch, 0); + OUT_VEB_BATCH(batch, 0); + OUT_VEB_BATCH(batch, 0); + ADVANCE_VEB_BATCH(batch); } else { assert(batch->flag == I915_EXEC_BSD); BEGIN_BCS_BATCH(batch, 4); @@ -202,8 +211,8 @@ intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch) if (batch->flag == I915_EXEC_RENDER) { BEGIN_BATCH(batch, 1); OUT_BATCH(batch, MI_FLUSH | MI_FLUSH_STATE_INSTRUCTION_CACHE_INVALIDATE); - ADVANCE_BATCH(batch); - } else { + ADVANCE_BATCH(batch); + } else { assert(batch->flag == I915_EXEC_BSD); BEGIN_BCS_BATCH(batch, 1); OUT_BCS_BATCH(batch, MI_FLUSH | MI_FLUSH_STATE_INSTRUCTION_CACHE_INVALIDATE); @@ -230,7 +239,8 @@ intel_batchbuffer_check_batchbuffer_flag(struct intel_batchbuffer *batch, int fl { if (flag != I915_EXEC_RENDER && flag != I915_EXEC_BLT && - flag != I915_EXEC_BSD) + flag != I915_EXEC_BSD && + flag != I915_EXEC_VEBOX) return; if (batch->flag == flag) @@ -276,6 +286,13 @@ intel_batchbuffer_start_atomic_bcs(struct intel_batchbuffer *batch, unsigned int } void +intel_batchbuffer_start_atomic_veb(struct intel_batchbuffer *batch, unsigned int size) +{ + intel_batchbuffer_start_atomic_helper(batch, I915_EXEC_VEBOX, size); +} + + +void intel_batchbuffer_end_atomic(struct intel_batchbuffer *batch) { assert(batch->atomic); diff --git a/src/intel_batchbuffer.h b/src/intel_batchbuffer.h index 8212de6..25d817b 100644 --- a/src/intel_batchbuffer.h +++ b/src/intel_batchbuffer.h @@ -72,11 +72,12 @@ void intel_batchbuffer_align(struct intel_batchbuffer *batch, unsigned int align #define BEGIN_BATCH(batch, n) __BEGIN_BATCH(batch, n, I915_EXEC_RENDER) #define BEGIN_BLT_BATCH(batch, n) __BEGIN_BATCH(batch, n, I915_EXEC_BLT) #define BEGIN_BCS_BATCH(batch, n) __BEGIN_BATCH(batch, n, I915_EXEC_BSD) - +#define BEGIN_VEB_BATCH(batch, n) __BEGIN_BATCH(batch, n, I915_EXEC_VEBOX) #define OUT_BATCH(batch, d) __OUT_BATCH(batch, d) #define OUT_BLT_BATCH(batch, d) __OUT_BATCH(batch, d) #define OUT_BCS_BATCH(batch, d) __OUT_BATCH(batch, d) +#define OUT_VEB_BATCH(batch, d) __OUT_BATCH(batch, d) #define OUT_RELOC(batch, bo, read_domains, write_domain, delta) \ __OUT_RELOC(batch, bo, read_domains, write_domain, delta) @@ -88,5 +89,6 @@ void intel_batchbuffer_align(struct intel_batchbuffer *batch, unsigned int align #define ADVANCE_BATCH(batch) __ADVANCE_BATCH(batch) #define ADVANCE_BLT_BATCH(batch) __ADVANCE_BATCH(batch) #define ADVANCE_BCS_BATCH(batch) __ADVANCE_BATCH(batch) +#define ADVANCE_VEB_BATCH(batch) __ADVANCE_BATCH(batch) #endif /* _INTEL_BATCHBUFFER_H_ */ |