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authorRichard Genoud <richard.genoud@gmail.com>2013-03-11 15:12:39 +0100
committerNicolas Ferre <nicolas.ferre@atmel.com>2013-03-13 10:25:07 +0100
commitf04feec2501774fe20fc7c77b5a16b9e23b36f95 (patch)
tree4eaa22ea539066d056c80ba3cb3d95a0c7146ea6 /arch/arm/boot/dts/at91sam9x5.dtsi
parentf6161aa153581da4a3867a2d1a7caf4be19b6ec9 (diff)
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ARM: at91: dt: at91sam9x5: correct NAND pins comments
Comments on NAND pins where inverted. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9x5.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index aa98e641931f..9b5d0480d7ee 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -238,8 +238,8 @@
nand {
pinctrl_nand: nand-0 {
atmel,pins =
- <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
- 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
+ <3 4 0x0 0x1 /* PD4 gpio Chip Enable pin pull_up */
+ 3 5 0x0 0x1>; /* PD5 gpio RDY/BUSY pin pull_up */
};
};