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authorQipan Li <Qipan.Li@csr.com>2013-08-15 06:52:16 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-08-14 18:33:09 -0700
commit1ef39808ca27837017a433f94aa7055cb8490e80 (patch)
treecc2b8a181fe21d51071154a410741494d771d512
parent2eb5618de87927e540055edc625b22f2d5662ab5 (diff)
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serial: sirf: add DT-binding document to describle detailed properties
we defined some special properties for hardware flow control, document them for DT-binding. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--Documentation/devicetree/bindings/tty/serial/sirf-uart.txt33
1 files changed, 33 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/tty/serial/sirf-uart.txt b/Documentation/devicetree/bindings/tty/serial/sirf-uart.txt
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+++ b/Documentation/devicetree/bindings/tty/serial/sirf-uart.txt
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+* CSR SiRFprimaII/atlasVI Universal Synchronous Asynchronous Receiver/Transmitter *
+
+Required properties:
+- compatible : Should be "sirf,prima2-uart" or "sirf, prima2-usp-uart"
+- reg : Offset and length of the register set for the device
+- interrupts : Should contain uart interrupt
+- fifosize : Should define hardware rx/tx fifo size
+- clocks : Should contain uart clock number
+
+Optional properties:
+- sirf,uart-has-rtscts: we have hardware flow controller pins in hardware
+- rts-gpios: RTS pin for USP-based UART if sirf,uart-has-rtscts is true
+- cts-gpios: CTS pin for USP-based UART if sirf,uart-has-rtscts is true
+
+Example:
+
+uart0: uart@b0050000 {
+ cell-index = <0>;
+ compatible = "sirf,prima2-uart";
+ reg = <0xb0050000 0x1000>;
+ interrupts = <17>;
+ fifosize = <128>;
+ clocks = <&clks 13>;
+};
+
+On the board-specific dts, we can put rts-gpios and cts-gpios like
+
+usp@b0090000 {
+ compatible = "sirf,prima2-usp-uart";
+ sirf,uart-has-rtscts;
+ rts-gpios = <&gpio 15 0>;
+ cts-gpios = <&gpio 46 0>;
+};